The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / 2010-09-29-mc-asm-header-test.ll

diff --git a/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll b/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll
index 561588d94943249c2fb25a1eee9d6c229595fd07..bda14bcb15202e638ea91b524d0cfcfa485a834e 100644 (file)
--- a/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll
+++ b/test/CodeGen/ARM/2010-09-29-mc-asm-header-test.ll
@@ -2,11 +2,11 @@
 ; This tests that MC/asm header conversion is smooth
 ;
 ; CHECK:      .syntax unified
-; CHECK-NEXT: .eabi_attribute 20, 1
-; CHECK-NEXT: .eabi_attribute 21, 1
-; CHECK-NEXT: .eabi_attribute 23, 3
-; CHECK-NEXT: .eabi_attribute 24, 1
-; CHECK-NEXT: .eabi_attribute 25, 1
+; CHECK: .eabi_attribute 20, 1
+; CHECK: .eabi_attribute 21, 1
+; CHECK: .eabi_attribute 23, 3
+; CHECK: .eabi_attribute 24, 1
+; CHECK: .eabi_attribute 25, 1
 
 define i32 @f(i64 %z) {
        ret i32 0