AVX-512: fixed a bug in getLoadStoreRegOpcode() for AVX-512 target

[oota-llvm.git] / test / CodeGen / ARM / a15-SD-dep.ll

diff --git a/test/CodeGen/ARM/a15-SD-dep.ll b/test/CodeGen/ARM/a15-SD-dep.ll
index a52468e5be9e281ee01b8766034e6817492d5170..019ff6129b0072550ec8626f5893247fd015d0bc 100644 (file)
--- a/test/CodeGen/ARM/a15-SD-dep.ll
+++ b/test/CodeGen/ARM/a15-SD-dep.ll
@@ -1,8 +1,8 @@
-; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -disable-a15-sd-optimization -verify-machineinstrs < %s  | FileCheck -check-prefix=DISABLED %s
-; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s | FileCheck -check-prefix=ENABLED %s
+; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -disable-a15-sd-optimization -verify-machineinstrs < %s  | FileCheck -check-prefix=CHECK-DISABLED %s
+; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-ENABLED %s
 
-; CHECK-ENABLED: t1:
-; CHECK-DISABLED: t1:
+; CHECK-ENABLED-LABEL: t1:
+; CHECK-DISABLED-LABEL: t1:
 define <2 x float> @t1(float %f) {
   ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
   ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
@@ -11,8 +11,8 @@ define <2 x float> @t1(float %f) {
   ret <2 x float> %i2
 }
 
-; CHECK-ENABLED: t2:
-; CHECK-DISABLED: t2:
+; CHECK-ENABLED-LABEL: t2:
+; CHECK-DISABLED-LABEL: t2:
 define <4 x float> @t2(float %g, float %f) {
   ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0]
   ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
@@ -21,8 +21,8 @@ define <4 x float> @t2(float %g, float %f) {
   ret <4 x float> %i2
 }
 
-; CHECK-ENABLED: t3:
-; CHECK-DISABLED: t3:
+; CHECK-ENABLED-LABEL: t3:
+; CHECK-DISABLED-LABEL: t3:
 define arm_aapcs_vfpcc <2 x float> @t3(float %f) {
   ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] 
   ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
@@ -31,8 +31,8 @@ define arm_aapcs_vfpcc <2 x float> @t3(float %f) {
   ret <2 x float> %i2
 }
 
-; CHECK-ENABLED: t4:
-; CHECK-DISABLED: t4:
+; CHECK-ENABLED-LABEL: t4:
+; CHECK-DISABLED-LABEL: t4:
 define <2 x float> @t4(float %f) {
   ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
   ; CHECK-DISABLED-NOT: vdup
@@ -45,8 +45,8 @@ b:
   ret <2 x float> %i2
 }
 
-; CHECK-ENABLED: t5:
-; CHECK-DISABLED: t5:
+; CHECK-ENABLED-LABEL: t5:
+; CHECK-DISABLED-LABEL: t5:
 define arm_aapcs_vfpcc <4 x float> @t5(<4 x float> %q, float %f) {
   ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
   ; CHECK-ENABLED: vadd.f32