Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM

[oota-llvm.git] / test / CodeGen / ARM / arm-returnaddr.ll

diff --git a/test/CodeGen/ARM/arm-returnaddr.ll b/test/CodeGen/ARM/arm-returnaddr.ll
index ec2ebc9aaeb37910c28218a6f05b825f351dfeb2..95edaad47e5f99c19ca0b2af8da1232bcc050d2a 100644 (file)
--- a/test/CodeGen/ARM/arm-returnaddr.ll
+++ b/test/CodeGen/ARM/arm-returnaddr.ll
@@ -1,11 +1,10 @@
-; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=linearscan | FileCheck %s
-; RUN: llc < %s -mtriple=thumbv6-apple-darwin -regalloc=linearscan | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin -regalloc=basic | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin -regalloc=basic | FileCheck %s
 ; rdar://8015977
 ; rdar://8020118
 
-; This test needs the reserved register r7 to be coalesced into the ldr.
-; So far, only linear scan can do that.
-
 define i8* @rt0(i32 %x) nounwind readnone {
 entry:
 ; CHECK: rt0: