The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / bfc.ll

diff --git a/test/CodeGen/ARM/bfc.ll b/test/CodeGen/ARM/bfc.ll
index 8bec9fec945e1786ab31464cb24a4daab28d14cf..c4a44b4472d1e0b130e86eaac84e147ca7c9595e 100644 (file)
--- a/test/CodeGen/ARM/bfc.ll
+++ b/test/CodeGen/ARM/bfc.ll
@@ -1,19 +1,25 @@
-; RUN: llvm-as < %s | llc -march=arm -mattr=+v6t2 | grep "bfc " | count 3
+; RUN: llc < %s -march=arm -mattr=+v6t2 | FileCheck %s
 
 ; 4278190095 = 0xff00000f
 define i32 @f1(i32 %a) {
+; CHECK: f1:
+; CHECK: bfc
     %tmp = and i32 %a, 4278190095
     ret i32 %tmp
 }
 
 ; 4286578688 = 0xff800000
 define i32 @f2(i32 %a) {
+; CHECK: f2:
+; CHECK: bfc
     %tmp = and i32 %a, 4286578688
     ret i32 %tmp
 }
 
 ; 4095 = 0x00000fff
 define i32 @f3(i32 %a) {
+; CHECK: f3:
+; CHECK: bfc
     %tmp = and i32 %a, 4095
     ret i32 %tmp
 }