The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / clz.ll

diff --git a/test/CodeGen/ARM/clz.ll b/test/CodeGen/ARM/clz.ll
index 80b7cd8fee9bab1bb47baa2f8d78149fcb70beb5..e381e0029819b1358818519b5e4385a4146986a8 100644 (file)
--- a/test/CodeGen/ARM/clz.ll
+++ b/test/CodeGen/ARM/clz.ll
@@ -1,9 +1,10 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v5t | grep "clz"
+; RUN: llc < %s -march=arm -mattr=+v5t | FileCheck %s
 
-declare uint %llvm.ctlz.i32(uint)
+declare i32 @llvm.ctlz.i32(i32)
 
-uint %test(uint %x) {
-       %tmp.1 = call uint %llvm.ctlz.i32( uint %x ) 
-       ret uint %tmp.1
+define i32 @test(i32 %x) {
+; CHECK: test
+; CHECK: clz r0, r0
+        %tmp.1 = call i32 @llvm.ctlz.i32( i32 %x )
+        ret i32 %tmp.1
 }