-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
-; RUN: grep {mov r0, #0} | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
-; RUN: grep {mov r0, #255$} | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
-; RUN: grep {mov r0.*256} | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
-; RUN: grep {orr.*256} | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
-; RUN: grep {mov r0, .*-1073741761} | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
-; RUN: grep {mov r0, .*1008} | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | \
-; RUN: grep {cmp r0, #1, 16} | count 1
-
-uint %f1() {
- ret uint 0
-}
+; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -disable-cgp-branch-opts | FileCheck %s
-uint %f2() {
- ret uint 255
+define i32 @f1() {
+; CHECK: f1
+; CHECK: mov r0, #0
+ ret i32 0
}
-uint %f3() {
- ret uint 256
+define i32 @f2() {
+; CHECK: f2
+; CHECK: mov r0, #255
+ ret i32 255
}
-uint %f4() {
- ret uint 257
+define i32 @f3() {
+; CHECK: f3
+; CHECK: mov r0, #256
+ ret i32 256
}
-uint %f5() {
- ret uint 3221225535
+define i32 @f4() {
+; CHECK: f4
+; CHECK: orr{{.*}}#256
+ ret i32 257
}
-uint %f6() {
- ret uint 1008
+define i32 @f5() {
+; CHECK: f5
+; CHECK: mov r0, #-1073741761
+ ret i32 -1073741761
}
-void %f7(uint %a) {
- %b = setgt uint %a, 65536
- br bool %b, label %r, label %r
+define i32 @f6() {
+; CHECK: f6
+; CHECK: mov r0, #1008
+ ret i32 1008
+}
+define void @f7(i32 %a) {
+; CHECK: f7
+; CHECK: cmp r0, #65536
+ %b = icmp ugt i32 %a, 65536
+ br i1 %b, label %r, label %r
r:
- ret void
+ ret void
}
+
+%t1 = type { <3 x float>, <3 x float> }
+
+@const1 = global %t1 { <3 x float> zeroinitializer,
+ <3 x float> <float 1.000000e+00,
+ float 2.000000e+00,
+ float 3.000000e+00> }, align 16
+; CHECK: const1
+; CHECK: .zero 16
+; CHECK: float 1.0
+; CHECK: float 2.0
+; CHECK: float 3.0
+; CHECK: .zero 4