Temporarily disable Hexagon tests. They are failing on OS X

[oota-llvm.git] / test / CodeGen / ARM / div.ll

diff --git a/test/CodeGen/ARM/div.ll b/test/CodeGen/ARM/div.ll
index 160e2524d6744bcc482add815ab8576b9dbf69e3..3d29e05a0ccf2d611c5cb370b3cd18b244c2e2bb 100644 (file)
--- a/test/CodeGen/ARM/div.ll
+++ b/test/CodeGen/ARM/div.ll
@@ -1,33 +1,33 @@
-; RUN: llc < %s -march=arm | FileCheck %s
+; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=CHECK-ARM
 
 define i32 @f1(i32 %a, i32 %b) {
 entry:
-; CHECK: _f1
-; CHECK: __divsi3
+; CHECK-ARM: f1
+; CHECK-ARM: __divsi3
         %tmp1 = sdiv i32 %a, %b         ; <i32> [#uses=1]
         ret i32 %tmp1
 }
 
 define i32 @f2(i32 %a, i32 %b) {
 entry:
-; CHECK: _f2
-; CHECK: __udivsi3
+; CHECK-ARM: f2
+; CHECK-ARM: __udivsi3
         %tmp1 = udiv i32 %a, %b         ; <i32> [#uses=1]
         ret i32 %tmp1
 }
 
 define i32 @f3(i32 %a, i32 %b) {
 entry:
-; CHECK: _f3
-; CHECK: __modsi3
+; CHECK-ARM: f3
+; CHECK-ARM: __modsi3
         %tmp1 = srem i32 %a, %b         ; <i32> [#uses=1]
         ret i32 %tmp1
 }
 
 define i32 @f4(i32 %a, i32 %b) {
 entry:
-; CHECK: _f4
-; CHECK: __umodsi3
+; CHECK-ARM: f4
+; CHECK-ARM: __umodsi3
         %tmp1 = urem i32 %a, %b         ; <i32> [#uses=1]
         ret i32 %tmp1
 }