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The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
fadds.ll
diff --git
a/test/CodeGen/ARM/fadds.ll
b/test/CodeGen/ARM/fadds.ll
index 113f0e29bd15800e00b1726c788d18d7bd87cf33..749690e98d0f4fb638a2b9b2cabb9780b8a3df59 100644
(file)
--- a/
test/CodeGen/ARM/fadds.ll
+++ b/
test/CodeGen/ARM/fadds.ll
@@
-20,4
+20,4
@@
entry:
; CORTEXA8: test:
; CORTEXA8: vadd.f32 d0, d1, d0
; CORTEXA9: test:
-; CORTEXA9: vadd.f32 s0, s
0, s1
+; CORTEXA9: vadd.f32 s0, s
1, s0