The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / fast-isel.ll

diff --git a/test/CodeGen/ARM/fast-isel.ll b/test/CodeGen/ARM/fast-isel.ll
index 023760b5d40eb24e03078fc6349eba37649b3d4a..dd806ec6f1aee1f4c9889e6fff6ef8fda236e117 100644 (file)
--- a/test/CodeGen/ARM/fast-isel.ll
+++ b/test/CodeGen/ARM/fast-isel.ll
@@ -13,27 +13,4 @@ entry:
   %tmp1 = load i32* %b.addr
   %add = add nsw i32 %tmp, %tmp1
   ret i32 %add
-}
-
-define i32* @foo(i32* %p, i32* %q, i32** %z) nounwind {
-entry:
-  %r = load i32* %p
-  %s = load i32* %q
-  %y = load i32** %z
-  br label %fast
-
-fast:
-  %t0 = add i32 %r, %s
-  %t1 = mul i32 %t0, %s
-  %t2 = sub i32 %t1, %s
-  %t3 = and i32 %t2, %s
-  %t4 = xor i32 %t3, 3
-  %t5 = xor i32 %t4, %s
-  %t6 = add i32 %t5, 2
-  %t7 = getelementptr i32* %y, i32 1
-  %t8 = getelementptr i32* %t7, i32 %t6
-  br label %exit
-
-exit:
-  ret i32* %t8
-}
+}
\ No newline at end of file