-; RUN: llvm-as < %s | llc -march=arm
+; RUN: llvm-as < %s | llc -march=arm | grep bic | count 2
+; RUN: llvm-as < %s | llc -march=arm -mattr=+v6,+vfp2 | \
+; RUN: grep fneg | count 2
-define csretcc void %__divsc3({ float, float }* %agg.result, float %a, float %b, float %c, float %d) {
-entry:
- br bool false, label %bb, label %cond_next375
-
-bb: ; preds = %entry
- %tmp81 = tail call float %copysignf( float 0x7FF0000000000000, float %c ) ; <float> [#uses=1]
- %tmp87 = mul float %tmp81, %b ; <float> [#uses=1]
- br label %cond_next375
-
-cond_next375: ; preds = %bb, %entry
- %y.1 = phi float [ %tmp87, %bb ], [ 0.000000e+00, %entry ] ; <float> [#uses=0]
- ret void
+define float @test1(float %x, double %y) {
+ %tmp = fpext float %x to double
+ %tmp2 = tail call double @copysign( double %tmp, double %y )
+ %tmp3 = fptrunc double %tmp2 to float
+ ret float %tmp3
}
-declare float %fabsf(float)
-
-declare bool %llvm.isunordered.f32(float, float)
+define double @test2(double %x, float %y) {
+ %tmp = fpext float %y to double
+ %tmp2 = tail call double @copysign( double %x, double %tmp )
+ ret double %tmp2
+}
-declare float %copysignf(float, float)
+declare double @copysign(double, double)