[mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests...

[oota-llvm.git] / test / CodeGen / ARM / fnmuls.ll

diff --git a/test/CodeGen/ARM/fnmuls.ll b/test/CodeGen/ARM/fnmuls.ll
index 486119b83d10f9fa2de881483af419c66182a2f8..de3b053bfc51227cd3725196c812d06c14e21378 100644 (file)
--- a/test/CodeGen/ARM/fnmuls.ll
+++ b/test/CodeGen/ARM/fnmuls.ll
@@ -1,20 +1,18 @@
-; XFAIL: *
-; RUN: llvm-as < %s | llc -march=arm -mattr=+vfp2 | FileCheck %s
-; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,+neonfp | FileCheck %s
-; RUN: llvm-as < %s | llc -march=arm -mattr=+neon,-neonfp | FileCheck %s
-; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a8 | FileCheck %s
-; RUN: llvm-as < %s | llc -march=arm -mcpu=cortex-a9 | FileCheck %s
+; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o - | FileCheck %s
+; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
+; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - | FileCheck %s
+; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - | FileCheck %s
 
-define float @test1(float %a, float %b) nounwind {
-; CHECK: fnmscs s2, s1, s0 
+define arm_aapcs_vfpcc float @test1(float %a, float %b) nounwind {
+; CHECK: vnmul.f32 s0, s0, s1 
 entry:
        %0 = fmul float %a, %b
         %1 = fsub float -0.0, %0
        ret float %1
 }
 
-define float @test2(float %a, float %b) nounwind {
-; CHECK: fnmscs s2, s1, s0 
+define arm_aapcs_vfpcc float @test2(float %a, float %b) nounwind {
+; CHECK: vnmul.f32 s0, s0, s1 
 entry:
        %0 = fmul float %a, %b
         %1 = fmul float -1.0, %0