The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / fp.ll

diff --git a/test/CodeGen/ARM/fp.ll b/test/CodeGen/ARM/fp.ll
index 681ccc1bf6030cbd58f534e02ea9aa570c87b8ad..8ef45f2bbc9783f43769f8d646a683e61c3f41e6 100644 (file)
--- a/test/CodeGen/ARM/fp.ll
+++ b/test/CodeGen/ARM/fp.ll
@@ -1,48 +1,78 @@
-; RUN: llvm-as < %s | llc -march=arm &&
-; RUN: llvm-as < %s | llc -march=arm | grep fmsr &&
-; RUN: llvm-as < %s | llc -march=arm | grep fmrs &&
-; RUN: llvm-as < %s | llc -march=arm | grep fmrrd &&
-; RUN: llvm-as < %s | llc -march=arm | grep fmdrr &&
-; RUN: llvm-as < %s | llc -march=arm | grep fldd &&
-; RUN: llvm-as < %s | llc -march=arm | grep flds &&
-; RUN: llvm-as < %s | llc -march=arm | grep fstd &&
-; RUN: llvm-as < %s | llc -march=arm | grep fsts &&
-; RUN: llvm-as < %s | llc -march=arm | grep ".word.*1065353216"
-
-
-double %h(double* %v) {
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+
+define float @f(i32 %a) {
+;CHECK: f:
+;CHECK: vmov
+;CHECK-NEXT: vcvt.f32.s32
+;CHECK-NEXT: vmov
 entry:
-       %tmp = load double* %v          ; <double> [#uses=1]
-       ret double %tmp
+        %tmp = sitofp i32 %a to float           ; <float> [#uses=1]
+        ret float %tmp
 }
 
-float %h() {
+define double @g(i32 %a) {
+;CHECK: g:
+;CHECK: vmov
+;CHECK-NEXT: vcvt.f64.s32
+;CHECK-NEXT: vmov
 entry:
-        ret float 1.000000e+00
+        %tmp = sitofp i32 %a to double          ; <double> [#uses=1]
+        ret double %tmp
 }
 
-double %f2(double %a) {
-        ret double %a
+define double @uint_to_double(i32 %a) {
+;CHECK: uint_to_double:
+;CHECK: vmov
+;CHECK-NEXT: vcvt.f64.u32
+;CHECK-NEXT: vmov
+entry:
+        %tmp = uitofp i32 %a to double          ; <double> [#uses=1]
+        ret double %tmp
 }
 
-void %f3() {
+define float @uint_to_float(i32 %a) {
+;CHECK: uint_to_float:
+;CHECK: vmov
+;CHECK-NEXT: vcvt.f32.u32
+;CHECK-NEXT: vmov
 entry:
-       %tmp = call double %f5()                ; <double> [#uses=1]
-       call void %f4(double %tmp )
-       ret void
+        %tmp = uitofp i32 %a to float           ; <float> [#uses=1]
+        ret float %tmp
 }
 
-declare void %f4(double)
-declare double %f5()
+define double @h(double* %v) {
+;CHECK: h:
+;CHECK: vldr.64 
+;CHECK-NEXT: vmov
+entry:
+        %tmp = load double* %v          ; <double> [#uses=1]
+        ret double %tmp
+}
 
-void %f6(float %a, float* %b) {
+define float @h2() {
+;CHECK: h2:
+;CHECK: mov r0, #254, #10
 entry:
-       store float %a, float* %b
-       ret void
+        ret float 1.000000e+00
 }
 
-void %f7(double %a, double* %b) {
+define double @f2(double %a) {
+;CHECK: f2:
+;CHECK-NOT: vmov
+        ret double %a
+}
+
+define void @f3() {
+;CHECK: f3:
+;CHECK-NOT: vmov
+;CHECK: f4
 entry:
-       store double %a, double* %b
-       ret void
+        %tmp = call double @f5( )               ; <double> [#uses=1]
+        call void @f4( double %tmp )
+        ret void
 }
+
+declare void @f4(double)
+
+declare double @f5()
+