The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / ifcvt5.ll

diff --git a/test/CodeGen/ARM/ifcvt5.ll b/test/CodeGen/ARM/ifcvt5.ll
index f6084b8479505896525fdedc32cfe03be9b771a0..3615055f8b29123e345d691f68ec094d09dc480c 100644 (file)
--- a/test/CodeGen/ARM/ifcvt5.ll
+++ b/test/CodeGen/ARM/ifcvt5.ll
@@ -1,7 +1,5 @@
 ; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
 
-; XFAIL: *
-
 @x = external global i32*              ; <i32**> [#uses=1]
 
 define void @foo(i32 %a) {
@@ -11,17 +9,17 @@ entry:
        ret void
 }
 
-define void @t1(i32 %a, i32 %b) {
+define i32 @t1(i32 %a, i32 %b) {
 ; CHECK: t1:
-; CHECK: ldmfdlt sp!, {r7, pc}
+; CHECK: poplt {r7, pc}
 entry:
        %tmp1 = icmp sgt i32 %a, 10             ; <i1> [#uses=1]
        br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
 
 cond_true:             ; preds = %entry
        tail call void @foo( i32 %b )
-       ret void
+       ret i32 0
 
 UnifiedReturnBlock:            ; preds = %entry
-       ret void
+       ret i32 1
 }