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ARM instructions that are both predicated and set the condition codes
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
ifcvt6.ll
diff --git
a/test/CodeGen/ARM/ifcvt6.ll
b/test/CodeGen/ARM/ifcvt6.ll
index 342208b6b5e24ddc83170d69aa80ea68296aeda1..e2c0ba398c68dc87c9d85ff0ac29496808b7e8b0 100644
(file)
--- a/
test/CodeGen/ARM/ifcvt6.ll
+++ b/
test/CodeGen/ARM/ifcvt6.ll
@@
-11,7
+11,7
@@
entry:
br i1 %tmp7, label %cond_true, label %UnifiedReturnBlock
cond_true: ; preds = %entry
- %tmp10 =
tail call i32 (...)* @bar( )
; <i32> [#uses=0]
+ %tmp10 =
call i32 (...)* @bar( )
; <i32> [#uses=0]
ret void
UnifiedReturnBlock: ; preds = %entry