The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / ifcvt8.ll

diff --git a/test/CodeGen/ARM/ifcvt8.ll b/test/CodeGen/ARM/ifcvt8.ll
index a7da834f7810f13592324fbf34a678b24bffe283..ca9a5c63cda67c1af7f1c05df9f2218e2fe731ad 100644 (file)
--- a/test/CodeGen/ARM/ifcvt8.ll
+++ b/test/CodeGen/ARM/ifcvt8.ll
@@ -1,11 +1,11 @@
-; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \
-; RUN:   grep ldmfdne | count 1
+; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s
 
        %struct.SString = type { i8*, i32, i32 }
 
 declare void @abort()
 
 define fastcc void @t(%struct.SString* %word, i8 signext  %c) {
+; CHECK: popne
 entry:
        %tmp1 = icmp eq %struct.SString* %word, null            ; <i1> [#uses=1]
        br i1 %tmp1, label %cond_true, label %cond_false