The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / imm.ll

diff --git a/test/CodeGen/ARM/imm.ll b/test/CodeGen/ARM/imm.ll
index 31db7a39e9ca23997a3602ec724f50e7b828ed3d..6f25f9dcb323d622b34e7dcd26dbbbd6d8aabb1b 100644 (file)
--- a/test/CodeGen/ARM/imm.ll
+++ b/test/CodeGen/ARM/imm.ll
@@ -1,17 +1,16 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | not grep CPI
+; RUN: llc < %s -march=arm | not grep CPI
 
-int %test1(int %A) {
-  %B = add int %A, -268435441  ; 0xF000000F
-  ret int %B
+define i32 @test1(i32 %A) {
+        %B = add i32 %A, -268435441             ; <i32> [#uses=1]
+        ret i32 %B
 }
 
-int %test2() {
-  ret int 65533
+define i32 @test2() {
+        ret i32 65533
 }
 
-int %test3(int %A) {
-  %B = or int %A, 65533
-  ret int %B
+define i32 @test3(i32 %A) {
+        %B = or i32 %A, 65533           ; <i32> [#uses=1]
+        ret i32 %B
 }
 
-