The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / indirectbr.ll

diff --git a/test/CodeGen/ARM/indirectbr.ll b/test/CodeGen/ARM/indirectbr.ll
index 132daaa2a80bf7a074cc2bcafdad79f027c98021..19dad3adfe6b5d578ac757b512f5b7cd8f520313 100644 (file)
--- a/test/CodeGen/ARM/indirectbr.ll
+++ b/test/CodeGen/ARM/indirectbr.ll
@@ -1,24 +1,28 @@
-; RUN: llc < %s -relocation-model=pic -march=arm | FileCheck %s -check-prefix=ARM
-; RUN: llc < %s -relocation-model=pic -march=thumb | FileCheck %s -check-prefix=THUMB
-; RUN: llc < %s -relocation-model=static -march=thumb -mattr=+thumb2 | FileCheck %s -check-prefix=THUMB2
+; RUN: llc < %s -relocation-model=pic -mtriple=arm-apple-darwin | FileCheck %s -check-prefix=ARM
+; RUN: llc < %s -relocation-model=pic -mtriple=thumb-apple-darwin | FileCheck %s -check-prefix=THUMB
+; RUN: llc < %s -relocation-model=static -mtriple=thumbv7-apple-darwin | FileCheck %s -check-prefix=THUMB2
 
 @nextaddr = global i8* null                       ; <i8**> [#uses=2]
 @C.0.2070 = private constant [5 x i8*] [i8* blockaddress(@foo, %L1), i8* blockaddress(@foo, %L2), i8* blockaddress(@foo, %L3), i8* blockaddress(@foo, %L4), i8* blockaddress(@foo, %L5)] ; <[5 x i8*]*> [#uses=1]
 
-define internal arm_apcscc i32 @foo(i32 %i) nounwind {
+define internal i32 @foo(i32 %i) nounwind {
 ; ARM: foo:
 ; THUMB: foo:
 ; THUMB2: foo:
 entry:
   %0 = load i8** @nextaddr, align 4               ; <i8*> [#uses=2]
   %1 = icmp eq i8* %0, null                       ; <i1> [#uses=1]
+; indirect branch gets duplicated here
+; ARM: bx
+; THUMB: mov pc,
+; THUMB2: mov pc,
   br i1 %1, label %bb3, label %bb2
 
 bb2:                                              ; preds = %entry, %bb3
   %gotovar.4.0 = phi i8* [ %gotovar.4.0.pre, %bb3 ], [ %0, %entry ] ; <i8*> [#uses=1]
 ; ARM: bx
-; THUMB: mov pc, r1
-; THUMB2: mov pc, r1
+; THUMB: mov pc,
+; THUMB2: mov pc,
   indirectbr i8* %gotovar.4.0, [label %L5, label %L4, label %L3, label %L2, label %L1]
 
 bb3:                                              ; preds = %entry
@@ -44,20 +48,17 @@ L2:                                               ; preds = %L3, %bb2
 
 L1:                                               ; preds = %L2, %bb2
   %res.3 = phi i32 [ %phitmp, %L2 ], [ 2, %bb2 ]  ; <i32> [#uses=1]
-; ARM: ldr r1, LCPI1_2
+; ARM: ldr r1, LCPI
 ; ARM: add r1, pc, r1
 ; ARM: str r1
-; THUMB: ldr.n r2, LCPI1_4
+; THUMB: ldr.n r2, LCPI
 ; THUMB: add r2, pc
 ; THUMB: str r2
-; THUMB2: ldr.n r2, LCPI1_2
+; THUMB2: ldr.n r2, LCPI
 ; THUMB2-NEXT: str r2
   store i8* blockaddress(@foo, %L5), i8** @nextaddr, align 4
   ret i32 %res.3
 }
-; ARM: LCPI1_2:
-; ARM-NEXT: .long L_foo_L5-(LPC2+8)
-; THUMB: LCPI1_4:
-; THUMB-NEXT: .long L_foo_L5-(LPC2+4)
-; THUMB2: LCPI1_2:
-; THUMB2-NEXT: .long L_foo_L5
+; ARM: .long Ltmp0-(LPC{{.*}}+8)
+; THUMB: .long Ltmp0-(LPC{{.*}}+4)
+; THUMB2: .long Ltmp0