The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / inlineasm.ll

diff --git a/test/CodeGen/ARM/inlineasm.ll b/test/CodeGen/ARM/inlineasm.ll
index a75c7469c0192657ec5273ca5af0363b29e95398..cca3c696b4a8bf91426270abcb11412188682b37 100644 (file)
--- a/test/CodeGen/ARM/inlineasm.ll
+++ b/test/CodeGen/ARM/inlineasm.ll
@@ -1,15 +1,11 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6
+; RUN: llc < %s -march=arm -mattr=+v6
 
-uint %test1(uint %tmp54) {
-  %tmp56 = tail call uint asm "uxtb16 $0,$1", "=r,r"( uint %tmp54 )
-  ret uint %tmp56
+define i32 @test1(i32 %tmp54) {
+       %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 )         ; <i32> [#uses=1]
+       ret i32 %tmp56
 }
 
-void %test2() {
-  %tmp1 = call long asm "ldmia $1!, {$0, ${0:H}}", "=r,==r,1"( int** null, int* null )
-  %tmp1 = cast long %tmp1 to ulong
-  %tmp2 = shr ulong %tmp1, ubyte 32
-  %tmp3 = cast ulong %tmp2 to int
-  %tmp4 = call int asm "pkhbt $0, $1, $2, lsl #16", "=r,r,r"( int 0, int %tmp3 )
-  ret void
+define void @test2() {
+       tail call void asm sideeffect "/* number: ${0:c} */", "i"( i32 1 )
+       ret void
 }