The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / ldrd.ll

diff --git a/test/CodeGen/ARM/ldrd.ll b/test/CodeGen/ARM/ldrd.ll
index c366e2dca5fb0ebfe312fdc3244f1510d44e5253..3856944c8f83d0551d46ad1b3834ab022fb18684 100644 (file)
--- a/test/CodeGen/ARM/ldrd.ll
+++ b/test/CodeGen/ARM/ldrd.ll
@@ -1,19 +1,21 @@
-; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=V6
+; RUN: llc < %s -mtriple=armv6-apple-darwin -regalloc=linearscan | FileCheck %s -check-prefix=V6
 ; RUN: llc < %s -mtriple=armv5-apple-darwin | FileCheck %s -check-prefix=V5
 ; RUN: llc < %s -mtriple=armv6-eabi | FileCheck %s -check-prefix=EABI
 ; rdar://r6949835
 
+; Magic ARM pair hints works best with linearscan.
+
 @b = external global i64*
 
 define i64 @t(i64 %a) nounwind readonly {
 entry:
-;V6:   ldrd r2, [r2]
+;V6:   ldrd r2, r3, [r2]
 
-;V5:   ldr r3, [r2]
-;V5:   ldr r2, [r2, #+4]
+;V5:   ldr r{{[0-9]+}}, [r2]
+;V5:   ldr r{{[0-9]+}}, [r2, #4]
 
-;EABI: ldr r3, [r2]
-;EABI: ldr r2, [r2, #+4]
+;EABI: ldr r{{[0-9]+}}, [r2]
+;EABI: ldr r{{[0-9]+}}, [r2, #4]
 
        %0 = load i64** @b, align 4
        %1 = load i64* %0, align 4