The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / long-setcc.ll

diff --git a/test/CodeGen/ARM/long-setcc.ll b/test/CodeGen/ARM/long-setcc.ll
index f5076e0289d381e5432a7684d9056105dd1c1366..c76a5e4d4d1f8fd837194c0fc124dff1242f9df1 100644 (file)
--- a/test/CodeGen/ARM/long-setcc.ll
+++ b/test/CodeGen/ARM/long-setcc.ll
@@ -1,7 +1,4 @@
-; RUN: llvm-as < %s | llc -march=arm &&
-; RUN: llvm-as < %s | llc -march=arm | grep cmp | wc -l | grep 1 &&
-; RUN: llvm-as < %s | llc -march=thumb &&
-; RUN: llvm-as < %s | llc -march=thumb | grep cmp | wc -l | grep 1
+; RUN: llc < %s -march=arm | grep cmp | count 1
 
 
 define i1 @t1(i64 %x) {