The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / lsr-code-insertion.ll

diff --git a/test/CodeGen/ARM/lsr-code-insertion.ll b/test/CodeGen/ARM/lsr-code-insertion.ll
index baa8cdddc61327c0f3528946a18cb3e675b2c505..1bbb96deeefefcc453d54675924b97113dd220e5 100644 (file)
--- a/test/CodeGen/ARM/lsr-code-insertion.ll
+++ b/test/CodeGen/ARM/lsr-code-insertion.ll
@@ -1,13 +1,13 @@
-; RUN: llvm-as < %s | llc -stats 2>&1 | grep '40.*Number of machine instrs printed'
-; This test really wants to check that the resultant "cond_true" block only has a single
-; store in it, and that cond_true55 only has code to materialize the constant and do
-; a store.  We do *not* want something like this:
+; RUN: llc < %s -stats |& grep {39.*Number of machine instrs printed}
+; RUN: llc < %s -stats |& not grep {.*Number of re-materialization}
+; This test really wants to check that the resultant "cond_true" block only 
+; has a single store in it, and that cond_true55 only has code to materialize 
+; the constant and do a store.  We do *not* want something like this:
 ;
 ;LBB1_3: @cond_true
 ;        add r8, r0, r6
 ;        str r10, [r8, #+4]
 ;
-
 target triple = "arm-apple-darwin8"
 
 define void @foo(i32* %mc, i32* %mpp, i32* %ip, i32* %dpp, i32* %tpmm, i32 %M, i32* %tpim, i32* %tpdm, i32* %bp, i32* %ms, i32 %xmb) {