Temporarily disable Hexagon tests. They are failing on OS X

[oota-llvm.git] / test / CodeGen / ARM / lsr-on-unrolled-loops.ll

diff --git a/test/CodeGen/ARM/lsr-on-unrolled-loops.ll b/test/CodeGen/ARM/lsr-on-unrolled-loops.ll
index 47379016cf14946fa4404e412d58b9dc9cfb2915..ea5ae8f51879a180badf5f9489aa66e7d959c871 100644 (file)
--- a/test/CodeGen/ARM/lsr-on-unrolled-loops.ll
+++ b/test/CodeGen/ARM/lsr-on-unrolled-loops.ll
@@ -4,9 +4,9 @@
 ; constant offset addressing, so that each of the following stores
 ; uses the same register.
 
-; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #32]
-; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #64]
-; CHECK: vstr.32 s{{.*}}, [{{(r[0-9]+)|(lr)}}, #96]
+; CHECK: vstr s{{.*}}, [{{(r[0-9]+)|(lr)}}, #32]
+; CHECK: vstr s{{.*}}, [{{(r[0-9]+)|(lr)}}, #64]
+; CHECK: vstr s{{.*}}, [{{(r[0-9]+)|(lr)}}, #96]
 
 ; We can also save a register in the outer loop, but that requires
 ; performing LSR on the outer loop.