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Add isel patterns for v2f32 / v4f32 neon.vbsl intrinsics. rdar://12471808
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
lsr-scale-addr-mode.ll
diff --git
a/test/CodeGen/ARM/lsr-scale-addr-mode.ll
b/test/CodeGen/ARM/lsr-scale-addr-mode.ll
index 02902f2debd39b95716dbd60aa210aaa282f0ca5..0c8d38748909b06a4edb7cda3b256599762c561b 100644
(file)
--- a/
test/CodeGen/ARM/lsr-scale-addr-mode.ll
+++ b/
test/CodeGen/ARM/lsr-scale-addr-mode.ll
@@
-1,4
+1,4
@@
-; RUN: ll
vm-as < %s | llc -march=arm | grep lsl | grep -F {lsl #2\]}
+; RUN: ll
c < %s -march=arm | grep lsl | grep -F "lsl #2]"
; Should use scaled addressing mode.
define void @sintzero(i32* %a) nounwind {