The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / memcpy-inline.ll

diff --git a/test/CodeGen/ARM/memcpy-inline.ll b/test/CodeGen/ARM/memcpy-inline.ll
index 5d1beea5fc2582c1401279a17c1344238d27957e..5bae037cafb3ccedaf492938cefa22a0b373207a 100644 (file)
--- a/test/CodeGen/ARM/memcpy-inline.ll
+++ b/test/CodeGen/ARM/memcpy-inline.ll
@@ -1,11 +1,11 @@
-; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrb
-; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin | grep ldrh
-; This used to look for ldmia. But it's no longer lucky enough to
-; have the load / store instructions lined up just right after
-; scheduler change for pr3457. We'll look for a robust solution
-; later.
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin -regalloc=linearscan -disable-post-ra | FileCheck %s
 
-       %struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
+; The ARM magic hinting works best with linear scan.
+; CHECK: ldrd
+; CHECK: strd
+; CHECK: ldrb
+
+%struct.x = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }
 @src = external global %struct.x
 @dst = external global %struct.x