The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / mul.ll

diff --git a/test/CodeGen/ARM/mul.ll b/test/CodeGen/ARM/mul.ll
index f4f0a04266c2e86abf33a14aca3742c346c5537f..466a8020accec8cad9b623f4e8ef636e008787fa 100644 (file)
--- a/test/CodeGen/ARM/mul.ll
+++ b/test/CodeGen/ARM/mul.ll
@@ -1,7 +1,5 @@
-; RUN: llvm-as < %s | llc -march=arm | grep mul | count 2
-; RUN: llvm-as < %s | llc -march=arm | grep lsl | count 2
-; RUN: llvm-as < %s | llc -march=thumb | grep mul | count 3
-; RUN: llvm-as < %s | llc -march=thumb | grep lsl | count 1
+; RUN: llc < %s -march=arm | grep mul | count 2
+; RUN: llc < %s -march=arm | grep lsl | count 2
 
 define i32 @f1(i32 %u) {
     %tmp = mul i32 %u, %u