Debug Info Testing: use null instead of an empty string in context field.

[oota-llvm.git] / test / CodeGen / ARM / mul_const.ll

diff --git a/test/CodeGen/ARM/mul_const.ll b/test/CodeGen/ARM/mul_const.ll
index 93188cdd883f613378a694f32eefb8c9cf853286..482d8f2888ce74aa714e26b2e1638bc6b1fdb836 100644 (file)
--- a/test/CodeGen/ARM/mul_const.ll
+++ b/test/CodeGen/ARM/mul_const.ll
@@ -1,17 +1,85 @@
 ; RUN: llc < %s -march=arm | FileCheck %s
 
-define i32 @t1(i32 %v) nounwind readnone {
+define i32 @t9(i32 %v) nounwind readnone {
 entry:
-; CHECK: t1:
+; CHECK-LABEL: t9:
 ; CHECK: add r0, r0, r0, lsl #3
        %0 = mul i32 %v, 9
        ret i32 %0
 }
 
-define i32 @t2(i32 %v) nounwind readnone {
+define i32 @t7(i32 %v) nounwind readnone {
 entry:
-; CHECK: t2:
+; CHECK-LABEL: t7:
 ; CHECK: rsb r0, r0, r0, lsl #3
        %0 = mul i32 %v, 7
        ret i32 %0
 }
+
+define i32 @t5(i32 %v) nounwind readnone {
+entry:
+; CHECK-LABEL: t5:
+; CHECK: add r0, r0, r0, lsl #2
+        %0 = mul i32 %v, 5
+        ret i32 %0
+}
+
+define i32 @t3(i32 %v) nounwind readnone {
+entry:
+; CHECK-LABEL: t3:
+; CHECK: add r0, r0, r0, lsl #1
+        %0 = mul i32 %v, 3
+        ret i32 %0
+}
+
+define i32 @t12288(i32 %v) nounwind readnone {
+entry:
+; CHECK-LABEL: t12288:
+; CHECK: add r0, r0, r0, lsl #1
+; CHECK: lsl{{.*}}#12
+        %0 = mul i32 %v, 12288
+        ret i32 %0
+}
+
+define i32 @tn9(i32 %v) nounwind readnone {
+entry:
+; CHECK-LABEL: tn9:
+; CHECK: add   r0, r0, r0, lsl #3
+; CHECK: rsb   r0, r0, #0
+        %0 = mul i32 %v, -9
+        ret i32 %0
+}
+
+define i32 @tn7(i32 %v) nounwind readnone {
+entry:
+; CHECK-LABEL: tn7:
+; CHECK: sub r0, r0, r0, lsl #3
+       %0 = mul i32 %v, -7
+       ret i32 %0
+}
+
+define i32 @tn5(i32 %v) nounwind readnone {
+entry:
+; CHECK-LABEL: tn5:
+; CHECK: add r0, r0, r0, lsl #2
+; CHECK: rsb r0, r0, #0
+        %0 = mul i32 %v, -5
+        ret i32 %0
+}
+
+define i32 @tn3(i32 %v) nounwind readnone {
+entry:
+; CHECK-LABEL: tn3:
+; CHECK: sub r0, r0, r0, lsl #2
+        %0 = mul i32 %v, -3
+        ret i32 %0
+}
+
+define i32 @tn12288(i32 %v) nounwind readnone {
+entry:
+; CHECK-LABEL: tn12288:
+; CHECK: sub r0, r0, r0, lsl #2
+; CHECK: lsl{{.*}}#12
+        %0 = mul i32 %v, -12288
+        ret i32 %0
+}