The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / mulhi.ll

diff --git a/test/CodeGen/ARM/mulhi.ll b/test/CodeGen/ARM/mulhi.ll
index bed3dba2a071527a3f35995f3134c7fad86795c4..148f291e551d7867b0d86682f4b2f8e1080a8ce4 100644 (file)
--- a/test/CodeGen/ARM/mulhi.ll
+++ b/test/CodeGen/ARM/mulhi.ll
@@ -1,23 +1,22 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm -mattr=+v6 | \
+; RUN: llc < %s -march=arm -mattr=+v6
+; RUN: llc < %s -march=arm -mattr=+v6 | \
 ; RUN:   grep smmul | count 1
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=arm | grep umull | count 1
+; RUN: llc < %s -march=arm | grep umull | count 1
 
-int %smulhi(int %x, int %y) {
-        %tmp = cast int %x to ulong             ; <ulong> [#uses=1]
-        %tmp1 = cast int %y to ulong            ; <ulong> [#uses=1]
-        %tmp2 = mul ulong %tmp1, %tmp           ; <ulong> [#uses=1]
-        %tmp3 = shr ulong %tmp2, ubyte 32               ; <ulong> [#uses=1]
-        %tmp3 = cast ulong %tmp3 to int         ; <int> [#uses=1]
-        ret int %tmp3
+define i32 @smulhi(i32 %x, i32 %y) {
+        %tmp = sext i32 %x to i64               ; <i64> [#uses=1]
+        %tmp1 = sext i32 %y to i64              ; <i64> [#uses=1]
+        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
+        %tmp3 = lshr i64 %tmp2, 32              ; <i64> [#uses=1]
+        %tmp3.upgrd.1 = trunc i64 %tmp3 to i32          ; <i32> [#uses=1]
+        ret i32 %tmp3.upgrd.1
 }
 
-int %umulhi(uint %x, uint %y) {
-        %tmp = cast uint %x to ulong            ; <ulong> [#uses=1]
-        %tmp1 = cast uint %y to ulong           ; <ulong> [#uses=1]
-        %tmp2 = mul ulong %tmp1, %tmp           ; <ulong> [#uses=1]
-        %tmp3 = shr ulong %tmp2, ubyte 32               ; <ulong> [#uses=1]
-        %tmp3 = cast ulong %tmp3 to int         ; <int> [#uses=1]
-        ret int %tmp3
+define i32 @umulhi(i32 %x, i32 %y) {
+        %tmp = zext i32 %x to i64               ; <i64> [#uses=1]
+        %tmp1 = zext i32 %y to i64              ; <i64> [#uses=1]
+        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
+        %tmp3 = lshr i64 %tmp2, 32              ; <i64> [#uses=1]
+        %tmp3.upgrd.2 = trunc i64 %tmp3 to i32          ; <i32> [#uses=1]
+        ret i32 %tmp3.upgrd.2
 }
-