MOVi16 (movw) is only legal on cpus with V6T2 support. rdar://12300648

[oota-llvm.git] / test / CodeGen / ARM / neon_ld2.ll

diff --git a/test/CodeGen/ARM/neon_ld2.ll b/test/CodeGen/ARM/neon_ld2.ll
index 547bab76356b9fd695ecfe8e8b7f836e9bee5d22..630db930357e681ed0f03a0c437b2a7ef66a072e 100644 (file)
--- a/test/CodeGen/ARM/neon_ld2.ll
+++ b/test/CodeGen/ARM/neon_ld2.ll
@@ -1,7 +1,10 @@
-; RUN: llc < %s -march=arm -mattr=+neon | grep vldmia | count 4
-; RUN: llc < %s -march=arm -mattr=+neon | grep vstmia | count 1
-; RUN: llc < %s -march=arm -mattr=+neon | grep fmrrd  | count 2
+; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
 
+; CHECK: t1
+; CHECK: vld1.64
+; CHECK: vld1.64
+; CHECK: vadd.i64 q
+; CHECK: vst1.64
 define void @t1(<4 x i32>* %r, <2 x i64>* %a, <2 x i64>* %b) nounwind {
 entry:
        %0 = load <2 x i64>* %a, align 16               ; <<2 x i64>> [#uses=1]
@@ -12,6 +15,12 @@ entry:
        ret void
 }
 
+; CHECK: t2
+; CHECK: vld1.64
+; CHECK: vld1.64
+; CHECK: vsub.i64 q
+; CHECK: vmov r0, r1, d
+; CHECK: vmov r2, r3, d
 define <4 x i32> @t2(<2 x i64>* %a, <2 x i64>* %b) nounwind readonly {
 entry:
        %0 = load <2 x i64>* %a, align 16               ; <<2 x i64>> [#uses=1]