The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / section.ll

diff --git a/test/CodeGen/ARM/section.ll b/test/CodeGen/ARM/section.ll
index fcb86c542a06a16d16e1661b2b3396a5d0717ccc..7a566d49d322d3dba678fed26b592e83ca6c7f77 100644 (file)
--- a/test/CodeGen/ARM/section.ll
+++ b/test/CodeGen/ARM/section.ll
@@ -1,6 +1,7 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | \
+; RUN: llc < %s -mtriple=arm-linux | \
 ; RUN:   grep {__DTOR_END__:}
-; RUN: llvm-upgrade < %s | llvm-as | llc -mtriple=arm-linux | \
-; RUN:   grep {.section .dtors,"aw",.progbits}
+; RUN: llc < %s -mtriple=arm-linux | \
+; RUN:   grep {\\.section.\\.dtors,"aw",.progbits}
+
+@__DTOR_END__ = internal global [1 x i32] zeroinitializer, section ".dtors"       ; <[1 x i32]*> [#uses=0]
 
-%__DTOR_END__ = internal global [1 x int] zeroinitializer, section ".dtors"