The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / str_pre-2.ll

diff --git a/test/CodeGen/ARM/str_pre-2.ll b/test/CodeGen/ARM/str_pre-2.ll
index 4f9ba4db4c2b6efc6e3c0cda8c1c81f813a39f3a..b24f75a6e2b80ec5e0ca2ad4189c24a8a1f5f794 100644 (file)
--- a/test/CodeGen/ARM/str_pre-2.ll
+++ b/test/CodeGen/ARM/str_pre-2.ll
@@ -1,4 +1,7 @@
-; RUN: llc < %s -mtriple=arm-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=armv6-linux-gnu -regalloc=linearscan | FileCheck %s
+; RUN: llc < %s -mtriple=armv6-linux-gnu -regalloc=basic | FileCheck %s
+
+; The greedy register allocator uses a single CSR here, invalidating the test.
 
 @b = external global i64*