The ARM disassembler did not handle the alignment correctly for VLD*DUP* instructions

[oota-llvm.git] / test / CodeGen / ARM / vargs_align.ll

diff --git a/test/CodeGen/ARM/vargs_align.ll b/test/CodeGen/ARM/vargs_align.ll
index b9702e5a9e43abf62daefccfc74a1f7e6bcc19a8..e4ef9e3c36c128ccba6f4a431801b62c1e8364ff 100644 (file)
--- a/test/CodeGen/ARM/vargs_align.ll
+++ b/test/CodeGen/ARM/vargs_align.ll
@@ -1,6 +1,5 @@
-; RUN: llvm-as < %s | llc -march=arm &&
-; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnueabi -disable-fp-elim | grep "add sp, sp, #16" &&
-; RUN: llvm-as < %s | llc -march=arm -mtriple=arm-linux-gnu -disable-fp-elim | grep "add sp, sp, #12"
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | FileCheck %s -check-prefix=EABI
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnu | FileCheck %s -check-prefix=OABI
 
 define i32 @f(i32 %a, ...) {
 entry:
@@ -17,4 +16,8 @@ entry:
 return:                ; preds = %entry
        %retval2 = load i32* %retval            ; <i32> [#uses=1]
        ret i32 %retval2
+; EABI: add sp, sp, #12
+; EABI: add sp, sp, #16
+; OABI: add sp, sp, #12
+; OABI: add sp, sp, #12
 }