Generate FMINNAN/FMINNUM/FMAXNAN/FMAXNUM from SDAGBuilder.

[oota-llvm.git] / test / CodeGen / ARM / vld3.ll

diff --git a/test/CodeGen/ARM/vld3.ll b/test/CodeGen/ARM/vld3.ll
index a98b35e9a6721e27907e28b5421d0264aeb73f12..0d14179ba73a384ac926d807aa0102fbc86980a1 100644 (file)
--- a/test/CodeGen/ARM/vld3.ll
+++ b/test/CodeGen/ARM/vld3.ll
@@ -38,7 +38,7 @@ define <4 x i16> @vld3i16(i16* %A) nounwind {
 define <4 x i16> @vld3i16_update(i16** %ptr, i32 %inc) nounwind {
 ;CHECK-LABEL: vld3i16_update:
 ;CHECK: vld3.16 {d16, d17, d18}, [{{r[0-9]+}}], {{r[0-9]+}}
-       %A = load i16** %ptr
+       %A = load i16*, i16** %ptr
        %tmp0 = bitcast i16* %A to i8*
        %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16(i8* %tmp0, i32 1)
        %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0
@@ -137,7 +137,7 @@ define <4 x i32> @vld3Qi32_update(i32** %ptr) nounwind {
 ;CHECK-LABEL: vld3Qi32_update:
 ;CHECK: vld3.32 {d16, d18, d20}, [r[[R:[0-9]+]]]!
 ;CHECK: vld3.32 {d17, d19, d21}, [r[[R]]]!
-       %A = load i32** %ptr
+       %A = load i32*, i32** %ptr
        %tmp0 = bitcast i32* %A to i8*
        %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32(i8* %tmp0, i32 1)
        %tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0