; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
define <4 x i16> @vpadals8(<4 x i16>* %A, <8 x i8>* %B) nounwind {
-;CHECK: vpadals8:
+;CHECK-LABEL: vpadals8:
;CHECK: vpadal.s8
%tmp1 = load <4 x i16>* %A
%tmp2 = load <8 x i8>* %B
}
define <2 x i32> @vpadals16(<2 x i32>* %A, <4 x i16>* %B) nounwind {
-;CHECK: vpadals16:
+;CHECK-LABEL: vpadals16:
;CHECK: vpadal.s16
%tmp1 = load <2 x i32>* %A
%tmp2 = load <4 x i16>* %B
}
define <1 x i64> @vpadals32(<1 x i64>* %A, <2 x i32>* %B) nounwind {
-;CHECK: vpadals32:
+;CHECK-LABEL: vpadals32:
;CHECK: vpadal.s32
%tmp1 = load <1 x i64>* %A
%tmp2 = load <2 x i32>* %B
}
define <4 x i16> @vpadalu8(<4 x i16>* %A, <8 x i8>* %B) nounwind {
-;CHECK: vpadalu8:
+;CHECK-LABEL: vpadalu8:
;CHECK: vpadal.u8
%tmp1 = load <4 x i16>* %A
%tmp2 = load <8 x i8>* %B
}
define <2 x i32> @vpadalu16(<2 x i32>* %A, <4 x i16>* %B) nounwind {
-;CHECK: vpadalu16:
+;CHECK-LABEL: vpadalu16:
;CHECK: vpadal.u16
%tmp1 = load <2 x i32>* %A
%tmp2 = load <4 x i16>* %B
}
define <1 x i64> @vpadalu32(<1 x i64>* %A, <2 x i32>* %B) nounwind {
-;CHECK: vpadalu32:
+;CHECK-LABEL: vpadalu32:
;CHECK: vpadal.u32
%tmp1 = load <1 x i64>* %A
%tmp2 = load <2 x i32>* %B
}
define <8 x i16> @vpadalQs8(<8 x i16>* %A, <16 x i8>* %B) nounwind {
-;CHECK: vpadalQs8:
+;CHECK-LABEL: vpadalQs8:
;CHECK: vpadal.s8
%tmp1 = load <8 x i16>* %A
%tmp2 = load <16 x i8>* %B
}
define <4 x i32> @vpadalQs16(<4 x i32>* %A, <8 x i16>* %B) nounwind {
-;CHECK: vpadalQs16:
+;CHECK-LABEL: vpadalQs16:
;CHECK: vpadal.s16
%tmp1 = load <4 x i32>* %A
%tmp2 = load <8 x i16>* %B
}
define <2 x i64> @vpadalQs32(<2 x i64>* %A, <4 x i32>* %B) nounwind {
-;CHECK: vpadalQs32:
+;CHECK-LABEL: vpadalQs32:
;CHECK: vpadal.s32
%tmp1 = load <2 x i64>* %A
%tmp2 = load <4 x i32>* %B
}
define <8 x i16> @vpadalQu8(<8 x i16>* %A, <16 x i8>* %B) nounwind {
-;CHECK: vpadalQu8:
+;CHECK-LABEL: vpadalQu8:
;CHECK: vpadal.u8
%tmp1 = load <8 x i16>* %A
%tmp2 = load <16 x i8>* %B
}
define <4 x i32> @vpadalQu16(<4 x i32>* %A, <8 x i16>* %B) nounwind {
-;CHECK: vpadalQu16:
+;CHECK-LABEL: vpadalQu16:
;CHECK: vpadal.u16
%tmp1 = load <4 x i32>* %A
%tmp2 = load <8 x i16>* %B
}
define <2 x i64> @vpadalQu32(<2 x i64>* %A, <4 x i32>* %B) nounwind {
-;CHECK: vpadalQu32:
+;CHECK-LABEL: vpadalQu32:
;CHECK: vpadal.u32
%tmp1 = load <2 x i64>* %A
%tmp2 = load <4 x i32>* %B