- Assign load / store with shifter op address modes the right itinerary classes.

[oota-llvm.git] / test / CodeGen / ARM / vst1.ll

diff --git a/test/CodeGen/ARM/vst1.ll b/test/CodeGen/ARM/vst1.ll
index c43b8aa99236247742fedc3c4da969941011a329..70f3a4cfa28c525fd2e7bd653806a2a944cdfe39 100644 (file)
--- a/test/CodeGen/ARM/vst1.ll
+++ b/test/CodeGen/ARM/vst1.ll
@@ -3,7 +3,7 @@
 define void @vst1i8(i8* %A, <8 x i8>* %B) nounwind {
 ;CHECK: vst1i8:
 ;Check the alignment value.  Max for this instruction is 64 bits:
-;CHECK: vst1.8 {d0}, [r0, :64]
+;CHECK: vst1.8 {d16}, [r0, :64]
        %tmp1 = load <8 x i8>* %B
        call void @llvm.arm.neon.vst1.v8i8(i8* %A, <8 x i8> %tmp1, i32 16)
        ret void
@@ -48,7 +48,7 @@ define void @vst1i64(i64* %A, <1 x i64>* %B) nounwind {
 define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind {
 ;CHECK: vst1Qi8:
 ;Check the alignment value.  Max for this instruction is 128 bits:
-;CHECK: vst1.8 {d0, d1}, [r0, :64]
+;CHECK: vst1.8 {d16, d17}, [r0, :64]
        %tmp1 = load <16 x i8>* %B
        call void @llvm.arm.neon.vst1.v16i8(i8* %A, <16 x i8> %tmp1, i32 8)
        ret void
@@ -57,7 +57,7 @@ define void @vst1Qi8(i8* %A, <16 x i8>* %B) nounwind {
 define void @vst1Qi16(i16* %A, <8 x i16>* %B) nounwind {
 ;CHECK: vst1Qi16:
 ;Check the alignment value.  Max for this instruction is 128 bits:
-;CHECK: vst1.16 {d0, d1}, [r0, :128]
+;CHECK: vst1.16 {d16, d17}, [r0, :128]
        %tmp0 = bitcast i16* %A to i8*
        %tmp1 = load <8 x i16>* %B
        call void @llvm.arm.neon.vst1.v8i16(i8* %tmp0, <8 x i16> %tmp1, i32 32)