X86: Make sure that we have SSE4.1 before we generate insertps nodes.

[oota-llvm.git] / test / CodeGen / ARM64 / simd-scalar-to-vector.ll

diff --git a/test/CodeGen/ARM64/simd-scalar-to-vector.ll b/test/CodeGen/ARM64/simd-scalar-to-vector.ll
index 6c0b840a5c10b6a973f0b2c6f632acd41d277173..10e8d6c0ea41c64ee91ef162a9d083d39936506e 100644 (file)
--- a/test/CodeGen/ARM64/simd-scalar-to-vector.ll
+++ b/test/CodeGen/ARM64/simd-scalar-to-vector.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
-; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -O0 | FileCheck %s --check-prefix=CHECK-FAST
+; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -mcpu=cyclone | FileCheck %s
+; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple -O0 -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
 
 define <16 x i8> @foo(<16 x i8> %a) nounwind optsize readnone ssp {
 ; CHECK: uaddlv.16b h0, v0