Use SCEVAddRecExpr::isAffine.

[oota-llvm.git] / test / CodeGen / Alpha / i32_sub_1.ll

diff --git a/test/CodeGen/Alpha/i32_sub_1.ll b/test/CodeGen/Alpha/i32_sub_1.ll
index ae254f2e9e10fc65b34adc528279466aafc9a485..7af813454072dadd13f4b31f93c3972dffb405a9 100644 (file)
--- a/test/CodeGen/Alpha/i32_sub_1.ll
+++ b/test/CodeGen/Alpha/i32_sub_1.ll
@@ -2,7 +2,7 @@
 ; RUN: llvm-as < %s | llc -march=alpha | grep -i {subl \$16,1,\$0}
 
 
-define i32 @foo(i32 sext %x) sext {
+define i32 @foo(i32 signext %x) signext {
 entry:
        %tmp.1 = add i32 %x, -1         ; <int> [#uses=1]
        ret i32 %tmp.1