Use SCEVAddRecExpr::isAffine.

[oota-llvm.git] / test / CodeGen / Alpha / neg1.ll

diff --git a/test/CodeGen/Alpha/neg1.ll b/test/CodeGen/Alpha/neg1.ll
index e8e50860bbeb0d533003a213e717b26c7124260e..ddaed4a0c6e24ffcba1bb7cedf299175f719aa22 100644 (file)
--- a/test/CodeGen/Alpha/neg1.ll
+++ b/test/CodeGen/Alpha/neg1.ll
@@ -1,9 +1,7 @@
 ; Make sure this testcase codegens to the lda -1 instruction
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep '\-1'
+; RUN: llvm-as < %s | llc -march=alpha | grep {\\-1}
 
-implementation   ; Functions:
-
-long %bar() {
+define i64 @bar() {
 entry:
-       ret long -1
+       ret i64 -1
 }