Use SCEVAddRecExpr::isAffine.

[oota-llvm.git] / test / CodeGen / Alpha / not.ll

diff --git a/test/CodeGen/Alpha/not.ll b/test/CodeGen/Alpha/not.ll
index bf00ce3966f26ad39d255393f213359e219a9185..cea9f6bc95f5863694d5801cfdb0da56dc80ef8c 100644 (file)
--- a/test/CodeGen/Alpha/not.ll
+++ b/test/CodeGen/Alpha/not.ll
@@ -1,10 +1,8 @@
 ; Make sure this testcase codegens to the ornot instruction
-; RUN: llvm-as < %s | llc -march=alpha | grep 'ornot'
+; RUN: llvm-as < %s | llc -march=alpha | grep eqv
 
-implementation   ; Functions:
-
-long %bar(long %x) {
+define i64 @bar(i64 %x) {
 entry:
-       %tmp.1 = xor long %x, -1                ; <long> [#uses=1]
-       ret long %tmp.1
+        %tmp.1 = xor i64 %x, -1         ; <i64> [#uses=1]
+        ret i64 %tmp.1
 }