Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.

[oota-llvm.git] / test / CodeGen / CellSPU / fneg-fabs.ll

diff --git a/test/CodeGen/CellSPU/fneg-fabs.ll b/test/CodeGen/CellSPU/fneg-fabs.ll
index 4c6fbb95a39f58306f605843c6be144124ab862a..6e01906dae699949b188d282565e9325058035e6 100644 (file)
--- a/test/CodeGen/CellSPU/fneg-fabs.ll
+++ b/test/CodeGen/CellSPU/fneg-fabs.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
+; RUN: llc < %s -march=cellspu > %t1.s
 ; RUN: grep 32768   %t1.s | count 2
 ; RUN: grep xor     %t1.s | count 4
 ; RUN: grep and     %t1.s | count 2
@@ -7,22 +7,22 @@ target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i
 target triple = "spu"
 
 define double @fneg_dp(double %X) {
-        %Y = sub double -0.000000e+00, %X
+        %Y = fsub double -0.000000e+00, %X
         ret double %Y
 }
 
 define <2 x double> @fneg_dp_vec(<2 x double> %X) {
-        %Y = sub <2 x double> < double -0.0000e+00, double -0.0000e+00 >, %X
+        %Y = fsub <2 x double> < double -0.0000e+00, double -0.0000e+00 >, %X
         ret <2 x double> %Y
 }
 
 define float @fneg_sp(float %X) {
-        %Y = sub float -0.000000e+00, %X
+        %Y = fsub float -0.000000e+00, %X
         ret float %Y
 }
 
 define <4 x float> @fneg_sp_vec(<4 x float> %X) {
-        %Y = sub <4 x float> <float -0.000000e+00, float -0.000000e+00,
+        %Y = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00,
                               float -0.000000e+00, float -0.000000e+00>, %X
         ret <4 x float> %Y
 }
@@ -32,11 +32,11 @@ declare double @fabs(double)
 declare float @fabsf(float)
 
 define double @fabs_dp(double %X) {
-        %Y = call double @fabs( double %X )
+        %Y = call double @fabs( double %X ) readnone
         ret double %Y
 }
 
 define float @fabs_sp(float %X) {
-        %Y = call float @fabsf( float %X )
+        %Y = call float @fabsf( float %X ) readnone
         ret float %Y
 }