-; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
-; RUN: grep lqa %t1.s | count 13 &&
-; RUN: grep shufb %t1.s | count 13 &&
-; RUN: grep 65520 %t1.s | count 1 &&
-; RUN: grep 43981 %t1.s | count 1 &&
-; RUN: grep 13702 %t1.s | count 1 &&
-; RUN: grep 81 %t1.s | count 2 &&
-; RUN: grep 28225 %t1.s | count 1 &&
-; RUN: grep 30720 %t1.s | count 1 &&
-; RUN: grep 192 %t1.s | count 32 &&
-; RUN: grep 128 %t1.s | count 30 &&
-; RUN: grep 224 %t1.s | count 2
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: grep lqa %t1.s | count 13
+; RUN: grep ilhu %t1.s | count 15
+; RUN: grep ila %t1.s | count 1
+; RUN: grep -w il %t1.s | count 6
+; RUN: grep shufb %t1.s | count 13
+; RUN: grep 65520 %t1.s | count 1
+; RUN: grep 43981 %t1.s | count 1
+; RUN: grep 13702 %t1.s | count 1
+; RUN: grep 28225 %t1.s | count 1
+; RUN: grep 30720 %t1.s | count 1
+; RUN: grep 3233857728 %t1.s | count 8
+; RUN: grep 2155905152 %t1.s | count 6
+; RUN: grep 66051 %t1.s | count 7
+; RUN: grep 471670303 %t1.s | count 11
target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
target triple = "spu"
ret i64 0 ;; IL
}
+define i64 @i64_const_9() {
+ ret i64 -1 ;; IL
+}
+
+define i64 @i64_const_10() {
+ ret i64 281470681808895 ;; IL 65535
+}
+
; 0x4005bf0a8b145769 ->
; (ILHU 0x4005 [16389]/IOHL 0xbf0a [48906])
; (ILHU 0x8b14 [35604]/IOHL 0x5769 [22377])