Add necessary 64-bit support so that gcc frontend compiles (mostly). Current

[oota-llvm.git] / test / CodeGen / CellSPU / int2fp.ll

diff --git a/test/CodeGen/CellSPU/int2fp.ll b/test/CodeGen/CellSPU/int2fp.ll
index 009229ea7bd16d9566fea715dbe586a9427a0ad5..ee3076594ad6b7813f2b96d8f0cc4aa66b9e0590 100644 (file)
--- a/test/CodeGen/CellSPU/int2fp.ll
+++ b/test/CodeGen/CellSPU/int2fp.ll
@@ -11,31 +11,31 @@ target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i
 target triple = "spu"
 
 define float @sitofp_i32(i32 %arg1) {
-       %A = sitofp i32 %arg1 to float          ; <float> [#uses=1]
-       ret float %A
+        %A = sitofp i32 %arg1 to float          ; <float> [#uses=1]
+        ret float %A
 }
 
 define float @uitofp_u32(i32 %arg1) {
-       %A = uitofp i32 %arg1 to float          ; <float> [#uses=1]
-       ret float %A
+        %A = uitofp i32 %arg1 to float          ; <float> [#uses=1]
+        ret float %A
 }
 
 define float @sitofp_i16(i16 %arg1) {
-       %A = sitofp i16 %arg1 to float          ; <float> [#uses=1]
-       ret float %A
+        %A = sitofp i16 %arg1 to float          ; <float> [#uses=1]
+        ret float %A
 }
 
 define float @uitofp_i16(i16 %arg1) {
-       %A = uitofp i16 %arg1 to float          ; <float> [#uses=1]
-       ret float %A
+        %A = uitofp i16 %arg1 to float          ; <float> [#uses=1]
+        ret float %A
 }
 
 define float @sitofp_i8(i8 %arg1) {
-       %A = sitofp i8 %arg1 to float           ; <float> [#uses=1]
-       ret float %A
+        %A = sitofp i8 %arg1 to float           ; <float> [#uses=1]
+        ret float %A
 }
 
 define float @uitofp_i8(i8 %arg1) {
-       %A = uitofp i8 %arg1 to float           ; <float> [#uses=1]
-       ret float %A
+        %A = uitofp i8 %arg1 to float           ; <float> [#uses=1]
+        ret float %A
 }