Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.

[oota-llvm.git] / test / CodeGen / CellSPU / intrinsics_float.ll

diff --git a/test/CodeGen/CellSPU/intrinsics_float.ll b/test/CodeGen/CellSPU/intrinsics_float.ll
index 64a5b73374d665d4332266aec1607fd5e36ae9c4..81373470d06926007b035ea1820aa53904df1cb6 100644 (file)
--- a/test/CodeGen/CellSPU/intrinsics_float.ll
+++ b/test/CodeGen/CellSPU/intrinsics_float.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
+; RUN: llc < %s -march=cellspu > %t1.s
 ; RUN: grep fa      %t1.s | count 5
 ; RUN: grep fs      %t1.s | count 5
 ; RUN: grep fm      %t1.s | count 15
@@ -28,15 +28,15 @@ declare <4 x float> @llvm.spu.si.fnms(<4 x float>, <4 x float>, <4 x float>)
 declare <4 x float> @llvm.spu.si.fms(<4 x float>, <4 x float>, <4 x float>)
 
 define <4 x i32> @test(<4 x i32> %A) {
-       call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3)
-       %Y = bitcast <4 x i32> %1 to <4 x i32>
-       ret <4 x i32> %Y
+        call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3)
+        %Y = bitcast <4 x i32> %1 to <4 x i32>
+        ret <4 x i32> %Y
 }
 
 define <4 x float> @fatest(<4 x float> %A, <4 x float> %B) {
-       call <4 x float> @llvm.spu.si.fa(<4 x float> %A, <4 x float> %B)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fa(<4 x float> %A, <4 x float> %B)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }
 
 define <4 x float> @fstest(<4 x float> %A, <4 x float> %B) {
@@ -46,49 +46,49 @@ define <4 x float> @fstest(<4 x float> %A, <4 x float> %B) {
 }
 
 define <4 x float> @fmtest(<4 x float> %A, <4 x float> %B) {
-       call <4 x float> @llvm.spu.si.fm(<4 x float> %A, <4 x float> %B)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fm(<4 x float> %A, <4 x float> %B)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }
 
 define <4 x float> @fceqtest(<4 x float> %A, <4 x float> %B) {
-       call <4 x float> @llvm.spu.si.fceq(<4 x float> %A, <4 x float> %B)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fceq(<4 x float> %A, <4 x float> %B)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }
 
 define <4 x float> @fcmeqtest(<4 x float> %A, <4 x float> %B) {
-       call <4 x float> @llvm.spu.si.fcmeq(<4 x float> %A, <4 x float> %B)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fcmeq(<4 x float> %A, <4 x float> %B)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }
 
 define <4 x float> @fcgttest(<4 x float> %A, <4 x float> %B) {
-       call <4 x float> @llvm.spu.si.fcgt(<4 x float> %A, <4 x float> %B)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fcgt(<4 x float> %A, <4 x float> %B)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }
 
 define <4 x float> @fcmgttest(<4 x float> %A, <4 x float> %B) {
-       call <4 x float> @llvm.spu.si.fcmgt(<4 x float> %A, <4 x float> %B)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fcmgt(<4 x float> %A, <4 x float> %B)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }
 
 define <4 x float> @fmatest(<4 x float> %A, <4 x float> %B, <4 x float> %C) {
-       call <4 x float> @llvm.spu.si.fma(<4 x float> %A, <4 x float> %B, <4 x float> %C)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fma(<4 x float> %A, <4 x float> %B, <4 x float> %C)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }
 
 define <4 x float> @fnmstest(<4 x float> %A, <4 x float> %B, <4 x float> %C) {
-       call <4 x float> @llvm.spu.si.fnms(<4 x float> %A, <4 x float> %B, <4 x float> %C)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fnms(<4 x float> %A, <4 x float> %B, <4 x float> %C)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }
 
 define <4 x float> @fmstest(<4 x float> %A, <4 x float> %B, <4 x float> %C) {
-       call <4 x float> @llvm.spu.si.fms(<4 x float> %A, <4 x float> %B, <4 x float> %C)
-       %Y = bitcast <4 x float> %1 to <4 x float>
-       ret <4 x float> %Y
+        call <4 x float> @llvm.spu.si.fms(<4 x float> %A, <4 x float> %B, <4 x float> %C)
+        %Y = bitcast <4 x float> %1 to <4 x float>
+        ret <4 x float> %Y
 }