Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.

[oota-llvm.git] / test / CodeGen / CellSPU / struct_1.ll

diff --git a/test/CodeGen/CellSPU/struct_1.ll b/test/CodeGen/CellSPU/struct_1.ll
index b0286d1bdc9bc4454b2c77a030b20094687b4109..8c3275080c69445b28f22029159828fda80a03ba 100644 (file)
--- a/test/CodeGen/CellSPU/struct_1.ll
+++ b/test/CodeGen/CellSPU/struct_1.ll
@@ -1,27 +1,29 @@
-; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
-; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s
-; RUN: grep lqa     %t1.s | count 10 &&
-; RUN: grep lqd     %t1.s | count 4 &&
-; RUN: grep rotqbyi %t1.s | count 5 &&
-; RUN: grep xshw    %t1.s | count 1 &&
-; RUN: grep andi    %t1.s | count 4 &&
-; RUN: grep cbd     %t1.s | count 3 &&
-; RUN: grep chd     %t1.s | count 1 &&
-; RUN: grep cwd     %t1.s | count 3 &&
-; RUN: grep shufb   %t1.s | count 7 &&
-; RUN: grep stqa    %t1.s | count 5
-; RUN: grep iohl    %t2.s | count 14 &&
-; RUN: grep ilhu    %t2.s | count 14 &&
-; RUN: grep lqx     %t2.s | count 14 &&
-; RUN: grep rotqbyi %t2.s | count 5 &&
-; RUN: grep xshw    %t2.s | count 1 &&
-; RUN: grep andi    %t2.s | count 4 &&
-; RUN: grep cbx     %t2.s | count 3 &&
-; RUN: grep chx     %t2.s | count 1 &&
-; RUN: grep cwx     %t2.s | count 1 &&
-; RUN: grep cwd     %t2.s | count 2 &&
-; RUN: grep shufb   %t2.s | count 7 &&
-; RUN: grep stqx    %t2.s | count 7
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s
+; RUN: grep lqa     %t1.s | count 5
+; RUN: grep lqd     %t1.s | count 11
+; RUN: grep rotqbyi %t1.s | count 7
+; RUN: grep xshw    %t1.s | count 1
+; RUN: grep andi    %t1.s | count 5
+; RUN: grep cbd     %t1.s | count 3
+; RUN: grep chd     %t1.s | count 1
+; RUN: grep cwd     %t1.s | count 3
+; RUN: grep shufb   %t1.s | count 7
+; RUN: grep stqd    %t1.s | count 7
+; RUN: grep iohl    %t2.s | count 16
+; RUN: grep ilhu    %t2.s | count 16
+; RUN: grep lqd     %t2.s | count 16
+; RUN: grep rotqbyi %t2.s | count 7
+; RUN: grep xshw    %t2.s | count 1
+; RUN: grep andi    %t2.s | count 5
+; RUN: grep cbd     %t2.s | count 3
+; RUN: grep chd     %t2.s | count 1
+; RUN: grep cwd     %t2.s | count 3
+; RUN: grep shufb   %t2.s | count 7
+; RUN: grep stqd    %t2.s | count 7
+
+; CellSPU legalization is over-sensitive to Legalize's traversal order.
+; XFAIL: *
 
 ; ModuleID = 'struct_1.bc'
 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
@@ -36,7 +38,7 @@ target triple = "spu"
 ;   int           i2;   // offset 12 [ignored]
 ;   unsigned char c4;   // offset 16 [ignored]
 ;   unsigned char c5;   // offset 17 [ignored]
-;   unsigned char c6;   // offset 18 [ignored]
+;   unsigned char c6;   // offset 18 (rotate left by 14 bytes to byte 3)
 ;   unsigned char c7;   // offset 19 (no rotate, in preferred slot)
 ;   int           i3;   // offset 20 [ignored]
 ;   int           i4;   // offset 24 [ignored]
@@ -48,88 +50,98 @@ target triple = "spu"
 ; struct hackstate state = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
 @state = global %struct.hackstate zeroinitializer, align 16
 
-define i8 @get_hackstate_c1() zeroext  {
+define zeroext i8 @get_hackstate_c1()  nounwind  {
 entry:
         %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16
         ret i8 %tmp2
 }
 
-define i8 @get_hackstate_c2() zeroext  {
+define zeroext i8 @get_hackstate_c2()  nounwind  {
 entry:
         %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16
         ret i8 %tmp2
 }
 
-define i8 @get_hackstate_c3() zeroext  {
+define zeroext i8 @get_hackstate_c3()  nounwind  {
 entry:
         %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16
         ret i8 %tmp2
 }
 
-define i32 @get_hackstate_i1() {
+define i32 @get_hackstate_i1() nounwind  {
 entry:
         %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 16
         ret i32 %tmp2
 }
 
-define i16 @get_hackstate_s1() signext  {
+define signext i16 @get_hackstate_s1()  nounwind  {
 entry:
         %tmp2 = load i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16
         ret i16 %tmp2
 }
 
-define i8 @get_hackstate_c7() zeroext  {
+define zeroext i8 @get_hackstate_c6()  nounwind  {
+entry:
+        %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 8), align 16
+        ret i8 %tmp2
+}
+
+define zeroext i8 @get_hackstate_c7()  nounwind  {
 entry:
         %tmp2 = load i8* getelementptr (%struct.hackstate* @state, i32 0, i32 9), align 16
         ret i8 %tmp2
 }
 
-define i32 @get_hackstate_i6() zeroext  {
+define i32 @get_hackstate_i3() nounwind  {
+entry:
+        %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 10), align 16
+        ret i32 %tmp2
+}
+
+define i32 @get_hackstate_i6() nounwind  {
 entry:
         %tmp2 = load i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16
         ret i32 %tmp2
 }
 
-define void @set_hackstate_c1(i8 zeroext  %c) {
+define void @set_hackstate_c1(i8 zeroext  %c) nounwind  {
 entry:
         store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 0), align 16
         ret void
 }
 
-define void @set_hackstate_c2(i8 zeroext  %c) {
+define void @set_hackstate_c2(i8 zeroext  %c) nounwind  {
 entry:
         store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 1), align 16
         ret void
 }
 
-define void @set_hackstate_c3(i8 zeroext  %c) {
+define void @set_hackstate_c3(i8 zeroext  %c) nounwind  {
 entry:
         store i8 %c, i8* getelementptr (%struct.hackstate* @state, i32 0, i32 2), align 16
         ret void
 }
 
-define void @set_hackstate_i1(i32 %i) {
+define void @set_hackstate_i1(i32 %i) nounwind  {
 entry:
         store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 3), align 16
         ret void
 }
 
-define void @set_hackstate_s1(i16 signext  %s) {
+define void @set_hackstate_s1(i16 signext  %s) nounwind  {
 entry:
         store i16 %s, i16* getelementptr (%struct.hackstate* @state, i32 0, i32 4), align 16
         ret void
 }
 
-define void @set_hackstate_i3(i32 %i) {
+define void @set_hackstate_i3(i32 %i) nounwind  {
 entry:
-        store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 11), align 16
+        store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 10), align 16
         ret void
 }
 
-
-define void @set_hackstate_i6(i32 %i) {
+define void @set_hackstate_i6(i32 %i) nounwind  {
 entry:
         store i32 %i, i32* getelementptr (%struct.hackstate* @state, i32 0, i32 13), align 16
         ret void
 }
-