Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.

[oota-llvm.git] / test / CodeGen / CellSPU / vec_const.ll

diff --git a/test/CodeGen/CellSPU/vec_const.ll b/test/CodeGen/CellSPU/vec_const.ll
index 7bcb2ef08b1e2e322425dd0599efed1217fda0d1..24c05c684084d5a4c6f6c3a1db8ac7cd6c2ca5b0 100644 (file)
--- a/test/CodeGen/CellSPU/vec_const.ll
+++ b/test/CodeGen/CellSPU/vec_const.ll
@@ -1,8 +1,8 @@
-; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
-; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s
-; RUN: grep il     %t1.s | count 16
+; RUN: llc < %s -march=cellspu > %t1.s
+; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s
+; RUN: grep -w il  %t1.s | count 3
 ; RUN: grep ilhu   %t1.s | count 8
-; RUN: grep ilh    %t1.s | count 13
+; RUN: grep -w ilh %t1.s | count 5
 ; RUN: grep iohl   %t1.s | count 7
 ; RUN: grep lqa    %t1.s | count 6
 ; RUN: grep 24672  %t1.s | count 2
@@ -18,7 +18,6 @@
 ; RUN: grep 11544  %t1.s | count 1
 ; RUN: grep 1311768467750121234 %t1.s | count 1
 ; RUN: grep lqd    %t2.s | count 6
-; XFAIL: *
 
 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128"
 target triple = "spu-unknown-elf"