[SystemZ] Add test missing from r186148

[oota-llvm.git] / test / CodeGen / MSP430 / AddrMode-bis-rx.ll

diff --git a/test/CodeGen/MSP430/AddrMode-bis-rx.ll b/test/CodeGen/MSP430/AddrMode-bis-rx.ll
index 3340494f6bbc30b33a8dfab14e363fc4a883fe0e..c7ecb5ab853f8798dc4082bf9422261d58a7a8a5 100644 (file)
--- a/test/CodeGen/MSP430/AddrMode-bis-rx.ll
+++ b/test/CodeGen/MSP430/AddrMode-bis-rx.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=msp430 | FileCheck %s
+; RUN: llc < %s -march=msp430 | FileCheck %s
 target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:16"
 target triple = "msp430-generic-generic"
 
@@ -29,10 +29,10 @@ define i8 @am3(i8 %x, i16 %n) nounwind {
        ret i8 %3
 }
 ; CHECK: am3:
-; CHECK:               bis.b   &bar(r14), r15
+; CHECK:               bis.b   bar(r14), r15
 
 define i16 @am4(i16 %x) nounwind {
-       %1 = volatile load i16* inttoptr(i16 32 to i16*)
+       %1 = load volatile i16* inttoptr(i16 32 to i16*)
        %2 = or i16 %1,%x
        ret i16 %2
 }
@@ -70,5 +70,5 @@ define i8 @am7(i8 %x, i16 %n) nounwind {
        ret i8 %4
 }
 ; CHECK: am7:
-; CHECK:               bis.b   &duh+2(r14), r15
+; CHECK:               bis.b   duh+2(r14), r15