AVX-512: added VCVTPH2PS, VCVTPS2PH with intrinsics

[oota-llvm.git] / test / CodeGen / MSP430 / Inst16mm.ll

diff --git a/test/CodeGen/MSP430/Inst16mm.ll b/test/CodeGen/MSP430/Inst16mm.ll
index 5fefead14bd1f9b2fab02ac347e26a5f93f7a097..5c93e37bfa96a67d74998a93455a0fef819e0236 100644 (file)
--- a/test/CodeGen/MSP430/Inst16mm.ll
+++ b/test/CodeGen/MSP430/Inst16mm.ll
@@ -1,12 +1,11 @@
-; RUN: llc -march=msp430 < %s | FileCheck %s
-; XFAIL: *
+; RUN: llc -march=msp430 -combiner-alias-analysis < %s | FileCheck %s
 target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
 target triple = "msp430-generic-generic"
 @foo = common global i16 0, align 2
 @bar = common global i16 0, align 2
 
 define void @mov() nounwind {
-; CHECK: mov:
+; CHECK-LABEL: mov:
 ; CHECK: mov.w &bar, &foo
         %1 = load i16* @bar
         store i16 %1, i16* @foo
@@ -14,7 +13,7 @@ define void @mov() nounwind {
 }
 
 define void @add() nounwind {
-; CHECK: add:
+; CHECK-LABEL: add:
 ; CHECK: add.w &bar, &foo
        %1 = load i16* @bar
        %2 = load i16* @foo
@@ -24,7 +23,7 @@ define void @add() nounwind {
 }
 
 define void @and() nounwind {
-; CHECK: and:
+; CHECK-LABEL: and:
 ; CHECK: and.w &bar, &foo
        %1 = load i16* @bar
        %2 = load i16* @foo
@@ -34,7 +33,7 @@ define void @and() nounwind {
 }
 
 define void @bis() nounwind {
-; CHECK: bis:
+; CHECK-LABEL: bis:
 ; CHECK: bis.w &bar, &foo
        %1 = load i16* @bar
        %2 = load i16* @foo
@@ -44,7 +43,7 @@ define void @bis() nounwind {
 }
 
 define void @xor() nounwind {
-; CHECK: xor:
+; CHECK-LABEL: xor:
 ; CHECK: xor.w &bar, &foo
        %1 = load i16* @bar
        %2 = load i16* @foo
@@ -53,3 +52,18 @@ define void @xor() nounwind {
        ret void
 }
 
+define i16 @mov2() nounwind {
+entry:
+ %retval = alloca i16                            ; <i16*> [#uses=3]
+ %x = alloca i32, align 2                        ; <i32*> [#uses=1]
+ %y = alloca i32, align 2                        ; <i32*> [#uses=1]
+ store i16 0, i16* %retval
+ %tmp = load i32* %y                             ; <i32> [#uses=1]
+ store i32 %tmp, i32* %x
+ store i16 0, i16* %retval
+ %0 = load i16* %retval                          ; <i16> [#uses=1]
+ ret i16 %0
+; CHECK-LABEL: mov2:
+; CHECK:       mov.w   2(r1), 6(r1)
+; CHECK:       mov.w   0(r1), 4(r1)
+}