[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / MSP430 / Inst16rm.ll

diff --git a/test/CodeGen/MSP430/Inst16rm.ll b/test/CodeGen/MSP430/Inst16rm.ll
index e6c52616c8f61d4bee2a6b8eaa1215d64f1e5205..4f6998ee68dfe9d73b8cf09efd8c38d0de25a8be 100644 (file)
--- a/test/CodeGen/MSP430/Inst16rm.ll
+++ b/test/CodeGen/MSP430/Inst16rm.ll
@@ -6,7 +6,7 @@ target triple = "msp430-generic-generic"
 define i16 @add(i16 %a) nounwind {
 ; CHECK-LABEL: add:
 ; CHECK: add.w &foo, r15
-       %1 = load i16* @foo
+       %1 = load i16, i16* @foo
        %2 = add i16 %a, %1
        ret i16 %2
 }
@@ -14,7 +14,7 @@ define i16 @add(i16 %a) nounwind {
 define i16 @and(i16 %a) nounwind {
 ; CHECK-LABEL: and:
 ; CHECK: and.w &foo, r15
-       %1 = load i16* @foo
+       %1 = load i16, i16* @foo
        %2 = and i16 %a, %1
        ret i16 %2
 }
@@ -22,7 +22,7 @@ define i16 @and(i16 %a) nounwind {
 define i16 @bis(i16 %a) nounwind {
 ; CHECK-LABEL: bis:
 ; CHECK: bis.w &foo, r15
-       %1 = load i16* @foo
+       %1 = load i16, i16* @foo
        %2 = or i16 %a, %1
        ret i16 %2
 }
@@ -30,7 +30,7 @@ define i16 @bis(i16 %a) nounwind {
 define i16  @bic(i16 %a) nounwind {
 ; CHECK-LABEL: bic:
 ; CHECK: bic.w &foo, r15
-        %1 = load i16* @foo
+        %1 = load i16, i16* @foo
         %2 = xor i16 %1, -1
         %3 = and i16 %a, %2
         ret i16 %3
@@ -39,7 +39,7 @@ define i16  @bic(i16 %a) nounwind {
 define i16 @xor(i16 %a) nounwind {
 ; CHECK-LABEL: xor:
 ; CHECK: xor.w &foo, r15
-       %1 = load i16* @foo
+       %1 = load i16, i16* @foo
        %2 = xor i16 %a, %1
        ret i16 %2
 }