[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / MSP430 / inline-asm.ll

diff --git a/test/CodeGen/MSP430/inline-asm.ll b/test/CodeGen/MSP430/inline-asm.ll
index 2cc25a4835d616190157cc193fe83b8c899fb45d..a2f13235b1d304d3b6e9a853f94c4042591a7386 100644 (file)
--- a/test/CodeGen/MSP430/inline-asm.ll
+++ b/test/CodeGen/MSP430/inline-asm.ll
@@ -15,11 +15,12 @@ define void @reg(i16 %a) nounwind {
 @foo = global i16 0, align 2
 
 define void @immmem() nounwind {
-        call void asm sideeffect "bic\09$0,r2", "i"(i16* getelementptr(i16* @foo, i32 1)) nounwind
+        call void asm sideeffect "bic\09$0,r2", "i"(i16* getelementptr(i16, i16* @foo, i32 1)) nounwind
         ret void
 }
 
 define void @mem() nounwind {
-        call void asm sideeffect "bic\09$0,r2", "m"(i16* @foo) nounwind
+        %fooval = load i16, i16* @foo
+        call void asm sideeffect "bic\09$0,r2", "m"(i16 %fooval) nounwind
         ret void
 }