[SystemZ] Add test missing from r186148

[oota-llvm.git] / test / CodeGen / MSP430 / setcc.ll

diff --git a/test/CodeGen/MSP430/setcc.ll b/test/CodeGen/MSP430/setcc.ll
index 971d1b5be8cf57472465ea72b5de2dce90ad3690..05f9acd448a5d4051893cb2cc9344283bd164996 100644 (file)
--- a/test/CodeGen/MSP430/setcc.ll
+++ b/test/CodeGen/MSP430/setcc.ll
@@ -10,9 +10,9 @@ define i16 @sccweqand(i16 %a, i16 %b) nounwind {
 }
 ; CHECK: sccweqand:
 ; CHECK:       bit.w   r14, r15
-; CHECK-NEXT:  mov.w   r2, r15
-; CHECK-NEXT:  and.w   #1, r15
-; CHECK-NEXT:  xor.w   #1, r15
+; CHECK:       mov.w   r2, r15
+; CHECK:       rra.w   r15
+; CHECK:       and.w   #1, r15
 
 define i16 @sccwneand(i16 %a, i16 %b) nounwind {
        %t1 = and i16 %a, %b
@@ -22,8 +22,8 @@ define i16 @sccwneand(i16 %a, i16 %b) nounwind {
 }
 ; CHECK: sccwneand:
 ; CHECK:       bit.w   r14, r15
-; CHECK-NEXT:  mov.w   r2, r15
-; CHECK-NEXT:  and.w   #1, r15
+; CHECK:       mov.w   r2, r15
+; CHECK:       and.w   #1, r15
 
 define i16 @sccwne(i16 %a, i16 %b) nounwind {
        %t1 = icmp ne i16 %a, %b
@@ -31,10 +31,11 @@ define i16 @sccwne(i16 %a, i16 %b) nounwind {
        ret i16 %t2
 }
 ; CHECK:sccwne:
-; CHECK:       cmp.w   r15, r14
-; CHECK-NEXT:  mov.w   r2, r15
-; CHECK-NEXT:  rra.w   r15
-; CHECK-NEXT:  and.w   #1, r15
+; CHECK:       cmp.w   r14, r15
+; CHECK:       mov.w   r2, r12
+; CHECK:       rra.w   r12
+; CHECK:       mov.w   #1, r15
+; CHECK:       bic.w   r12, r15
 
 define i16 @sccweq(i16 %a, i16 %b) nounwind {
        %t1 = icmp eq i16 %a, %b
@@ -42,11 +43,10 @@ define i16 @sccweq(i16 %a, i16 %b) nounwind {
        ret i16 %t2
 }
 ; CHECK:sccweq:
-; CHECK:       cmp.w   r15, r14
-; CHECK-NEXT:  mov.w   r2, r15
-; CHECK-NEXT:  rra.w   r15
-; CHECK-NEXT:  and.w   #1, r15
-; CHECK-NEXT:  xor.w   #1, r15
+; CHECK:       cmp.w   r14, r15
+; CHECK:       mov.w   r2, r15
+; CHECK:       rra.w   r15
+; CHECK:       and.w   #1, r15
 
 define i16 @sccwugt(i16 %a, i16 %b) nounwind {
        %t1 = icmp ugt i16 %a, %b
@@ -54,10 +54,9 @@ define i16 @sccwugt(i16 %a, i16 %b) nounwind {
        ret i16 %t2
 }
 ; CHECK:sccwugt:
-; CHECK:       cmp.w   r14, r15
-; CHECK-NEXT:  mov.w   r2, r15
-; CHECK-NEXT:  and.w   #1, r15
-; CHECK-NEXT:  xor.w   #1, r15
+; CHECK:       cmp.w   r15, r14
+; CHECK:       mov.w   #1, r15
+; CHECK:       bic.w   r2, r15
 
 define i16 @sccwuge(i16 %a, i16 %b) nounwind {
        %t1 = icmp uge i16 %a, %b
@@ -65,9 +64,9 @@ define i16 @sccwuge(i16 %a, i16 %b) nounwind {
        ret i16 %t2
 }
 ; CHECK:sccwuge:
-; CHECK:       cmp.w   r15, r14
-; CHECK-NEXT:  mov.w   r2, r15
-; CHECK-NEXT:  and.w   #1, r15
+; CHECK:       cmp.w   r14, r15
+; CHECK:       mov.w   r2, r15
+; CHECK:       and.w   #1, r15
 
 define i16 @sccwult(i16 %a, i16 %b) nounwind {
        %t1 = icmp ult i16 %a, %b
@@ -75,10 +74,9 @@ define i16 @sccwult(i16 %a, i16 %b) nounwind {
        ret i16 %t2
 }
 ; CHECK:sccwult:
-; CHECK:       cmp.w   r15, r14
-; CHECK-NEXT:  mov.w   r2, r15
-; CHECK-NEXT:  and.w   #1, r15
-; CHECK-NEXT:  xor.w   #1, r15
+; CHECK:       cmp.w   r14, r15
+; CHECK:       mov.w   #1, r15
+; CHECK:       bic.w   r2, r15
 
 define i16 @sccwule(i16 %a, i16 %b) nounwind {
        %t1 = icmp ule i16 %a, %b
@@ -86,9 +84,9 @@ define i16 @sccwule(i16 %a, i16 %b) nounwind {
        ret i16 %t2
 }
 ; CHECK:sccwule:
-; CHECK:       cmp.w   r14, r15
-; CHECK-NEXT:  mov.w   r2, r15
-; CHECK-NEXT:  and.w   #1, r15
+; CHECK:       cmp.w   r15, r14
+; CHECK:       mov.w   r2, r15
+; CHECK:       and.w   #1, r15
 
 define i16 @sccwsgt(i16 %a, i16 %b) nounwind {
        %t1 = icmp sgt i16 %a, %b