Follow up to r165072. Try a different approach: only move the load when it's going...

[oota-llvm.git] / test / CodeGen / Mips / select.ll

diff --git a/test/CodeGen/Mips/select.ll b/test/CodeGen/Mips/select.ll
index c83fa3ece0268b655c63673d01a29d1c34138ad6..40115befc45d5c9c8577eed5f2747a30ab98861b 100644 (file)
--- a/test/CodeGen/Mips/select.ll
+++ b/test/CodeGen/Mips/select.ll
@@ -1,13 +1,11 @@
-; RUN: llc  < %s -march=mipsel -mcpu=4ke | FileCheck %s -check-prefix=CHECK-MIPS32R2
-; RUN: llc  < %s -march=mipsel | FileCheck %s -check-prefix=CHECK-MIPS1
+; RUN: llc  < %s -march=mipsel | FileCheck %s -check-prefix=CHECK
 
 @d2 = external global double
 @d3 = external global double
 
 define i32 @sel1(i32 %s, i32 %f0, i32 %f1) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: movn
-; CHECK-MIPS1: beq
+; CHECK: movn
   %tobool = icmp ne i32 %s, 0
   %cond = select i1 %tobool, i32 %f1, i32 %f0
   ret i32 %cond
@@ -15,8 +13,7 @@ entry:
 
 define float @sel2(i32 %s, float %f0, float %f1) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: movn.s
-; CHECK-MIPS1: beq
+; CHECK: movn.s
   %tobool = icmp ne i32 %s, 0
   %cond = select i1 %tobool, float %f0, float %f1
   ret float %cond
@@ -24,8 +21,7 @@ entry:
 
 define double @sel2_1(i32 %s, double %f0, double %f1) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: movn.d
-; CHECK-MIPS1: beq
+; CHECK: movn.d
   %tobool = icmp ne i32 %s, 0
   %cond = select i1 %tobool, double %f0, double %f1
   ret double %cond
@@ -33,10 +29,8 @@ entry:
 
 define float @sel3(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.eq.s
-; CHECK-MIPS32R2: movt.s
-; CHECK-MIPS1: c.eq.s
-; CHECK-MIPS1: bc1f
+; CHECK: c.eq.s
+; CHECK: movt.s
   %cmp = fcmp oeq float %f2, %f3
   %cond = select i1 %cmp, float %f0, float %f1
   ret float %cond
@@ -44,10 +38,8 @@ entry:
 
 define float @sel4(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.olt.s
-; CHECK-MIPS32R2: movt.s
-; CHECK-MIPS1: c.olt.s
-; CHECK-MIPS1: bc1f
+; CHECK: c.olt.s
+; CHECK: movt.s
   %cmp = fcmp olt float %f2, %f3
   %cond = select i1 %cmp, float %f0, float %f1
   ret float %cond
@@ -55,10 +47,8 @@ entry:
 
 define float @sel5(float %f0, float %f1, float %f2, float %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.ule.s
-; CHECK-MIPS32R2: movf.s
-; CHECK-MIPS1: c.ule.s
-; CHECK-MIPS1: bc1t
+; CHECK: c.ule.s
+; CHECK: movf.s
   %cmp = fcmp ogt float %f2, %f3
   %cond = select i1 %cmp, float %f0, float %f1
   ret float %cond
@@ -66,10 +56,8 @@ entry:
 
 define double @sel5_1(double %f0, double %f1, float %f2, float %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.ule.s
-; CHECK-MIPS32R2: movf.d
-; CHECK-MIPS1: c.ule.s
-; CHECK-MIPS1: bc1t
+; CHECK: c.ule.s
+; CHECK: movf.d
   %cmp = fcmp ogt float %f2, %f3
   %cond = select i1 %cmp, double %f0, double %f1
   ret double %cond
@@ -77,10 +65,8 @@ entry:
 
 define double @sel6(double %f0, double %f1, double %f2, double %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.eq.d
-; CHECK-MIPS32R2: movt.d
-; CHECK-MIPS1: c.eq.d
-; CHECK-MIPS1: bc1f
+; CHECK: c.eq.d
+; CHECK: movt.d
   %cmp = fcmp oeq double %f2, %f3
   %cond = select i1 %cmp, double %f0, double %f1
   ret double %cond
@@ -88,10 +74,8 @@ entry:
 
 define double @sel7(double %f0, double %f1, double %f2, double %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.olt.d
-; CHECK-MIPS32R2: movt.d
-; CHECK-MIPS1: c.olt.d
-; CHECK-MIPS1: bc1f
+; CHECK: c.olt.d
+; CHECK: movt.d
   %cmp = fcmp olt double %f2, %f3
   %cond = select i1 %cmp, double %f0, double %f1
   ret double %cond
@@ -99,10 +83,8 @@ entry:
 
 define double @sel8(double %f0, double %f1, double %f2, double %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.ule.d
-; CHECK-MIPS32R2: movf.d
-; CHECK-MIPS1: c.ule.d
-; CHECK-MIPS1: bc1t
+; CHECK: c.ule.d
+; CHECK: movf.d
   %cmp = fcmp ogt double %f2, %f3
   %cond = select i1 %cmp, double %f0, double %f1
   ret double %cond
@@ -110,10 +92,8 @@ entry:
 
 define float @sel8_1(float %f0, float %f1, double %f2, double %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.ule.d
-; CHECK-MIPS32R2: movf.s
-; CHECK-MIPS1: c.ule.d
-; CHECK-MIPS1: bc1t
+; CHECK: c.ule.d
+; CHECK: movf.s
   %cmp = fcmp ogt double %f2, %f3
   %cond = select i1 %cmp, float %f0, float %f1
   ret float %cond
@@ -121,10 +101,8 @@ entry:
 
 define i32 @sel9(i32 %f0, i32 %f1, float %f2, float %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.eq.s
-; CHECK-MIPS32R2: movt
-; CHECK-MIPS1: c.eq.s
-; CHECK-MIPS1: bc1f
+; CHECK: c.eq.s
+; CHECK: movt
   %cmp = fcmp oeq float %f2, %f3
   %cond = select i1 %cmp, i32 %f0, i32 %f1
   ret i32 %cond
@@ -132,10 +110,8 @@ entry:
 
 define i32 @sel10(i32 %f0, i32 %f1, float %f2, float %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.olt.s
-; CHECK-MIPS32R2: movt
-; CHECK-MIPS1: c.olt.s
-; CHECK-MIPS1: bc1f
+; CHECK: c.olt.s
+; CHECK: movt
   %cmp = fcmp olt float %f2, %f3
   %cond = select i1 %cmp, i32 %f0, i32 %f1
   ret i32 %cond
@@ -143,10 +119,8 @@ entry:
 
 define i32 @sel11(i32 %f0, i32 %f1, float %f2, float %f3) nounwind readnone {
 entry:
-; CHECK-MIPS32R2: c.ule.s
-; CHECK-MIPS32R2: movf
-; CHECK-MIPS1: c.ule.s
-; CHECK-MIPS1: bc1t
+; CHECK: c.ule.s
+; CHECK: movf
   %cmp = fcmp ogt float %f2, %f3
   %cond = select i1 %cmp, i32 %f0, i32 %f1
   ret i32 %cond
@@ -154,10 +128,8 @@ entry:
 
 define i32 @sel12(i32 %f0, i32 %f1) nounwind readonly {
 entry:
-; CHECK-MIPS32R2: c.eq.d
-; CHECK-MIPS32R2: movt
-; CHECK-MIPS1: c.eq.d
-; CHECK-MIPS1: bc1f
+; CHECK: c.eq.d
+; CHECK: movt
   %tmp = load double* @d2, align 8, !tbaa !0
   %tmp1 = load double* @d3, align 8, !tbaa !0
   %cmp = fcmp oeq double %tmp, %tmp1
@@ -167,10 +139,8 @@ entry:
 
 define i32 @sel13(i32 %f0, i32 %f1) nounwind readonly {
 entry:
-; CHECK-MIPS32R2: c.olt.d
-; CHECK-MIPS32R2: movt
-; CHECK-MIPS1: c.olt.d
-; CHECK-MIPS1: bc1f
+; CHECK: c.olt.d
+; CHECK: movt
   %tmp = load double* @d2, align 8, !tbaa !0
   %tmp1 = load double* @d3, align 8, !tbaa !0
   %cmp = fcmp olt double %tmp, %tmp1
@@ -180,10 +150,8 @@ entry:
 
 define i32 @sel14(i32 %f0, i32 %f1) nounwind readonly {
 entry:
-; CHECK-MIPS32R2: c.ule.d
-; CHECK-MIPS32R2: movf
-; CHECK-MIPS1: c.ule.d
-; CHECK-MIPS1: bc1t
+; CHECK: c.ule.d
+; CHECK: movf
   %tmp = load double* @d2, align 8, !tbaa !0
   %tmp1 = load double* @d3, align 8, !tbaa !0
   %cmp = fcmp ogt double %tmp, %tmp1